Over the years laser applications to semiconductor device processing have evolved along distinct lines. Those involving interactions and effects in the inactive part of the chip came first, while those involved alterations in material in the active part of the chip have attracted more interest recently. In this review paper we highlight examples from each of these categories.

Recent developments are reported for the conversion of polysilicon layers on SiO₂ into device-worthy, large grain or single crystalline Si-on-Insulator material, using a cw Ar laser. The advantages of beam shaping and of oscillation of the growth front are shown. Finally, the utility of rapid laser scanning (1-10 m/sec) is reported, and the practical limitatibns of this technique are defined.

Laser applications to the thermal processing of integrated circuits may be divided into two broad categories: one, applications to the improvement of existing process steps and, two, applications to processes that will allow fabrication of novel device structures. This paper will briefly review these applications, discuss potential problems in the use of lasers for device processing and possible solutions to these problems.

Currently widespread commercial applications of laser processing in the microelectronics industry is limited to resistor trimming by micromachining, link blowing for the repair of very large memory circuits, mask repair, and wafer labeling. This paper describes several potential applications for laser processing which are being investigated at Texas A&M. The areas are given below with a brief summary of the results.

Gas immersion laser diffusion (GILDing) is a novel method for doping semiconductor materials directly from a dopant-containing cover gas. It takes advantage both of the rapid diffusion of the dopant into a molten semiconductor and of the rapid liquid phase epitaxial regrowth of the same semiconductor as a high quality single crystal material.

A method of planarizing integrated circuit devices which is compatible with VLSI requirements is presented. This method utilizes either cw or pulsed radiation from a tunable CO₂ laser to selectively heat, for example, a thin layer of phosphosilicate glass causing it to flow. Flow, which is characterized as a decrease in glass viscosity sufficient to provide smoothing of the device topography, occurs without adversely affecting the under-lying or exposed device materials. Application of the laser activated flow method to the fabrication of integrated circuits with multilevel metallization systems is demonstrated.

High intensity pulsed laser irradiation of semiconductor materials results in ultra-fast melting and resolidification of a thin surface layer. An experimental probe has been developed based on the discontinuous change in electrical conductivity of a semiconductor material upon melting. Real time monitoring of the dynamics of pulsed laser melting and resolidification can be obtained by transient electrical conductance measurements. Melting velocities from 5 to 200 m/s and resolidification velocities of 1 to 20 m/s have been observed in silicon with this technique. Simultaneous measurement of the optical reflectance provides additional complementary information on laser melting dynamics. Data from both electrical conductance and optical reflectance measurements are presented for silicon and gallium arsenide. The real time experimental data provide strong evidence for a simple thermal model for melting and resolidification during nanosecond pulsed laser annealing.

Some new device structures are proposed in which a set of folding and rotation operations is used to transform planar MOSFET device configurations into three-dimensional structures in beam-recrystallized polysilicon films. Some of the resulting devices use both sides of a recrystallized film for MOSFET device fabrication, while others use a single gate to modulate the surfaces of two separate films simultaneously. Preliminary circuit simulations have been performed to study the speed and yield possibilities of several basic-circuits.

3-D integration of semiconductor devices will ultimately be realized via the use of laser or electron beam processed polysilicon. Although it is desirable to generate single crystal regions from polycrystalline silicon deposited in appropriate locations on a device structure during the course of device fabrication, that may not always be feasible for various reasons. It is, therefore, absolutely imperative to understand the performance of devices fabricated in either very large grain polysilicon or in near single crystal material containing defects and grain boundaries. In order to model devices fabricated in polysilicon with arbitrary grain size and trap density distribution, we have developed a conceptually novel approach to describe conduction in polysilicon. This methodology has been used to investigate the effects of laser restructuring of polysilicon.

The electrical characteristics of grain boundaries in polycrystalline silicon have been investigated. Experiments were performed using a focused laser beam to measure the GB parameters. Theoretical models of phonon-assisted and charge scattering processes are presented in relation to attenuation of the thermionic emission. The results indicate that the GB states behave as extrinsic impurity states which are not sensitive to the misorientation angle between grains. Both majority and minority carrier behavior are described.

A physical model that describes the effects of grain boundaries on the linear-region, strong-inversion channel conductance of SOI (polysilicon on silicon-dioxide) MOSFETs is developed and is supported by measurements of laser-recrystallized devices. The model predicts an effective turn-on characteristic that occurs beyond the strong-inversion threshold, and henceforth defines the "carrier mobility threshold voltage" and the effective (transconductance) carrier mobility in the channel, which typically is higher than the actual (intragrain) mobility. These parameters, which are defined by the properties of the grain boundaries, can easily be misinterpreted experimentally as the threshold voltage and the actual carrier mobility. The actual threshold voltage is defined by the charge coupling between the front and back gates of the thin-film transistor. This coupling is discussed and a closed-form expression for the threshold voltage, which depends on the back-gate bias and on the properties of the back Si-Si0₂ interface, is given.

High performance thin-film transistors (TFTs) have been fabricated in single-crystal silicon thin films on fused quartz substrates. The single-crystal islands for device fabrication are produced from patterned and encapsulated polysilicon films crystallized with a scanning CO₂ laser. We have previously reported on metal-gate n-channel enhancement mode TFTs with channel mobilities > 900 cm2/V-s, leakage currents < 10 pA, and voltage thresholds < 1 V. In this paper, we will report for the first time our work on depletion mode as well as enhancement mode devices fabricated with a polysilicon-gate NMOS process. These devices have channel lengths of 6 to 20 µm. Channel mobilities of > 900 cm²/V-s are again indicative of single-crystal islands. Leakage currents of ~ 1 pA are achieved by back channel ion implantation. Voltage thresholds vary by < 0.3 V, and the yield for working devices is 98%. The results anticipate the achievement of a high-performance integrated SOI circuit technology.

The laser blowing of MoSi₂/Poly-n + fuse links is reported. The polycide links were successfully blown under 10K Å of PSG (phospho silicate glass used for isolation between the link and the aluminum) at laser power levels comparable to those used for standard poly link vaporization. Also, the size of the crater in the PSG, produced by the expanding gases associated with link vaporization, was found to be less than that for standard poly links. Laser power levels were found which gave both a near unity blowing probability and produced no substrate damage when the link was located on top of 7-10K Å of field oxide. The successful blowing of silicide links is very important with respect to the use of both laser redundancy and silicides in VLSI technology.

The complexity of integrated circuits has progressed from a single logic function on a chip consisting of a few dozen transistors to a complete, single chip 32-bit microprocessor of 100,000 transistors. This growth has created a challenge for the product designer--to utilize the increased functional capacity available with VLSI, while still developing designs rapidly and at a reasonable cost.

The evolution of laser implemented redundancy, or simply "laser redundancy", as a production process used to improve semiconductor manufacturing yields, is described. Increasingly demanding process requirements and associated implications for laser equipment are identified. Finally, laser redundancy appears to be just the first of many applications where the laser will be used to modify semiconductor circuits.

Selection of alignment targets for memory redundancy repair is a design step that critically affects the yield of the device repair process. Assuming accurate laser beam positioning and energy density control, the ability of the system to reliably identify a reference on each die will result in a high fix-to-attempt ratio on repairable memories.

Current and projected applications of laser micromachining in the semiconductor industry are discussed. A precision laser irradiation system designed for applications in the production of very large scale integrated circuits is described. The equipment incorporates a frequency doubled neodymium in YAG laser, high numerical aperture optics and a precision XY stage. The laser is engineered to produce short pulses reliably in order to simplify control of laser induced thermal effects. Several examples of application of the equipment are described.

Microscopic laser-initiated chemical reactions can be used to write micrometer-scale features on materials of interest for solid-state electronics. In this paper, we describe the nature of direct-write-type fabrication and summarize the laser techniques which have been developed.

We describe techniques for laser enhanced plating of gold, nickel and copper. This maskless plating results in speeds up to 10³ times that of conventional plating. Mechanisms and applications are discussed.

An excimer laser is used to photochemically deposit thin films of silicon dioxide, silicon nitride, aluminum oxide, and zinc oxide at low temperatures (100-350°C). Deposition rates in excess of 3000 Å/min and conformal coverage over vertical walled steps were demonstrated. The films exhibit low defect density and high breakdown voltage and have been characterized using IR spectrophotometry, AES, and C-V analysis. Device compatibility has been studied by using photodeposited films as interlayer dielectrics, diffusion masks, and passivation layers in production CMOS devices. Additionally, we have deposited metallic films of Al, Mo, W, and Cr over large (>5 cm²) areas using UV photodissociation of trimethylaluminum and the refractory metal hexacarbonyls. Both shiny metallic films as well as black particulate films were obtained depending on the deposition geometry. The black films are shown to grow in columnar grains. The depositions were made at room temperature over pyrex and quartz plates as well as silicon wafers. We have examined the resistivity, adhesion, stress and step coverage of these films. The films exhibited resistivities at most %20 times that of the bulk materials and tensile stress no higher than 7 x 109 dynes/cm².

Laser-induced chemical etching has been demonstrated in a variety of materials including metals, ceramics, insulators and semiconductors. Depending on the laser and the gas used, etching can be quite rapid, especially when compared with reactive ion etching rates. Since it is frequently desirable to work with a gas-solid system that is inert in the absence of radiation, rather high power densities are often required to achieve etching. When the solid is the principal light absorber in the system, such power densities result in intense local excitation of the solid, as well as heat. Using semiconductor etching as an example, several factors which may be responsible for fast etch rates have been identified. These include the consequences of high temperatures at the solid surface, as well as evidence for participation of photo-generated carriers in the etching chemistry in a model system.

Rapid drilling of vias in thick wafers (381 µm) of GaAs has been achieved by a laser assisted etching process. The technique utilized a CW visible argon ion laser and an etchant gas of low pressure C1₂. Data on the dependence of the etch rate on the laser power, wavelength and C1₂ gas pressure are presented.

The laser-plasma X-ray source has been evaluated for submicrometer X-ray lithography exposure machines. X-ray lithography systems based on commercially available lasers of reasonable cost appear to be feasible. Such machines would make full wafer exposures of silicon slices with a throughput consistent with current manufacturing requirements.

Pulsed laser-Raman spectroscopy and laser-excited fluorescence have been used to profile reactive species concentrations inside a chemical vapor deposition cell. Experimental data and theoretical calculations indicate that gas-phase chemical kinetics plays an important role in the deposition process.