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Today, precision of a few nanometers is requiid to measure critical dimensions (CD's). Measurement tools must and are being designed to be more stable over both short and long periods. In addition, the high spatial resolution of a scanning electron microscope (SEM) is making it possible to determine moi about the semiconductor feature itself. This paper reports on new data collection and analysis techniques that yield more meaningful and reliable values for SEM-measured CD's including information about (1) CD variation along the feature, (2) individual edge roughness and (3) variations due to the measuring instniment. At TV rates an electron beam is raster-scanned over a small area of interest containing a pitch or line. A CD value is computed from the video signal associated with each of the raster's horizontal scans across the sample. The average of these separately computed CD values is taken to be the CD of record. This method preserves information about "apparent" edge roughness and orientation. However, the contribution of "real" edge roughness is determined only through further analysis. A correlation program was created to compare edge and CD data sets. Plots of various correlations showed that contributions to the standard deviation of edge and CD data sets were quantifiable. For instance, a correlation of a CD data set with itself, but with data acquired at a different time, generated a number that could be associated with the contribution of random video noise. A correlation of a CD data set with itself, but with its position shifted in the data collection window, differentiated contributions of the real feature roughness and other data set variations not assodated with the sample. The correlation piots also revealed information about the frequency of these various contributions.
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As feature sizes get smaller the error of measurement must also become
smaller. An adequate sub-micron measurement must be correct, within a certain or
determined error limit. The error limit for a metrology instrument designed for use on
sub-micron features in a production environment, the Opal 702, was investigated
experimentally.
There are numerous contributors to Iinewidth measurement uncertainty; (1)
Dynamic Precision (including wafer and system variations), (2) system Stability
(determined in a way to avoid including wafer stability), and (3) Offset (dependent
on signal interpretation or algorithm) [1]. In a practical way all these variables are
incorporated in (4) Dynamic Uncertainty.
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By means of electron-beam induced x-rays, the thickness of films
used in fabrication of integrated circuits can be measured with high
precision. The thickness modulated intensity of the x-rays generated
from the sub-layer material due to penetration of the electron beam
is correlated to the thickness of the surface film and displayed as a
3-D thickness map of the film material)'2 Scanning thickness
mapping is a technique for measuring and plotting film thickness over
the surface of the devices with high spatial resolution in the X-Y
plane, using the modulation effect on electron beam induced x-rays.
This technique has been implemented at this laboratory using a
scanning electron microscope (SEM) in conjunction with an energy
dispersive x-ray analyzer (EDXA).
Since the electrons must interact with the material below the
film that is being measured, they must be of sufficient energy to
penetrate the film and produce enough x-rays in the sub-layer to be
detectable in a reasonable time frame. To accomplish this, the
analyst is required to initially determine the optimum beam energy
for the sample to be measured. Typically, the optimum beam energy is
several kilovolts above the onset of beam penetration through the
film.
This report will present data obtained for a dielectric film over
aluminum metal and aluminum on silicon. A simulated 3-D scanning
thickness mapping display of dielectric thickness was obtained by
converting raw x-ray intensity data received from the energy
dispersive x-ray analyzer. The raw x-ray intensity data was
corrected for x-ray absorption effects and translated into film
thickness values. These calculated values were then compared to SEM
visual measurements of a cross-sectioned sample. Correlation between
the scanning thickness mapping measurements and the SEM visual
measurements will be discussed.
The benefits of this technique are the high degree of
characterization of the film thickness in the X-Y plane, and the
detection of hole defects in film and thickness non-uniformities at
contact areas or at steps.
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This paper preseni3 an experimental evaluation of defect generation and device damage
in dry develop lithography a compared to 3tandard -wet develop- lithography. A 3tandard
g-line process and the DESIRE® process were compared. Defect generation wa evaluated
by u3ing electrical te3t structure3 to measure open and 3hort defects on aluminum and
polysilicon. The short defect densitie3 were very aimilar for both lithographie, while the
open den3ities were larger for dry developed wafers. Thi3 i. attributed to the ue of a negative
tone resist. Device damage wa aJ3e33ed by processing and characterizing capacitors
and active devices. No device damage inherent to the use of plasmas for lithography was
identified.
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Many designs of misalignment test structures have been developed
to evaluate registration error. It is desirable to compare the
capabilities of these structures. However, a quantitative measure of
comparison for such structures is not available. An attempt has been
made in this paper to evaluate a quantitative comparison criterion.
Technical merit of a test structure can be determined from the
accuracy and precision of the measurement data. A Figure of Merit(FOM)
is described here, for comparing the capabilities of two or more such
test structures quantitatively.
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As the feature size requirements of TJLSI devices continue to decrease below the practical limits of standard optical
metrology, alternate measurement methodologies will be utilized on a more routine basis during device fabrication. A
series of linewidth measurements of photoresist on polysilicon and etched polysilicon equal line/space gratings having
nominal linewidths ranging from 0.45 jim to 2.0 p.m has been performed using a variety of metrology techniques.
Features fabricated using a 248 nm deep UV laser stepper and 405 nm near UV stepper were used in the experiments.
Top-down low-voltage SEM measurements, electrical resistance measurements, confocal ultraviolet laser scanning
microscope profiles, and SEM measurements on cleaved cross sections are compared. By measuring a large number of
points on each line and die, the variability of the linewidths themselves, the measurement precision of the techniques, and
the measurement bias between the methods are isolated. Experimental procedures and measurement techniques are
described along with the resultant data.
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The complexity of integrated circuits processing has made CD control a challenging work,
especially in a high volume manufacturing environment such as the one where this study was
done. Many factors contribute to linewidth variability, namely previous process variation,
consistency of equipment performance, and human intervention.
To effectively reduce CD variations in such a high volume manufacturing Fab, a two
phase study was carried out. In phase I, several sources of variation were evaluated through
Variance Components Analysis. This analysis gave a better understanding of where variation
seen in some critical layers was coming from as well as providing information needed to
prioritize efforts in variance reduction. Variables selected for inclusion in this study were
etchers, steppers, day to day litho process fluctuations, and lot to lot poly substrates.
Findings from phase I showed that of those variables included in the study, stepper to
stepper variation was the major contributor to the CD variation.
In order to reduce this effect of stepper variation a two step plan was formulated. The
first step was to place a customized exposure correction into the software for each stepper,
thus bringing the stepper means together. A second step was initially considered but not
implemented as of this writing for logistical reasons. The objective of this second step was
to reduce the variance by grouping the least sensitive steppers (lowest variance) to process
the most sensitive masking layers.
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We show that the focal planecontrast of the confocal scanning thser microscope can be used effectively to measure
critical dimensions at the base ofsubmicrometer photoresist structures. The results, when compared with high-voltage
SEM measurements, are found to be highly feature dependent; separate threshold optimizations are required for each
case. A new criterion, incremental response, was introduced to aid in measurement system evaluation.
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To adress the problems encountered when measuring subinicrons CD patterns with white light microscopy, an instrument
using the ultraviolet spectrum around 280 urn has been designed and tested.
The technologies developped for dealing simultaneously with ultraviolet, visible and infrared light are pnsented.
The main advantage lies in the absorbance ofphotonsists, leading to simple optical proffles.
Theontical results obtained with a modelling approach are iepoited along with experimental results characterized with
respect to SEM cross sections.
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The development of the real-time confocal scanning optical microscope (RSOM) has made it easy for those familiar with
standard optical microscopes to use the excellent range definition and cross-sectioning ability afforded by the RSOM to
inspect integrated circuits. The ability of the RSOM to optically section a sample allows us to construct three-dimensional
(3D) image projections of the sample surface. The depth response function, IV(z)12, of the microscope can be used to relate
the relative height of a particular point on the sample to the received intensity allowing the surface to be reconstructed from
the microscope image. Surface reconstructions based upon this method are shown to have comparable resolution to
measurements obtained using a contact profilometer. This approach is extended to larger height variations by using the focal
information from each optical section to determine the "coarse" height at each pixel location. Height variations within each
section can be calculated using the received intensity at each pixel location in conjunction with the depth response function of
the microscope. The intra-layer height variations are added to the coarse height at each pixel location to produce a map of the
integrated circuit surface.
The surface reconstruction can be shaded according to the strength of the received signal or with a lighting model to emphasize
different properties of the surface. The surface reconstruction calculated using the depth response function of the microscope
can be correlated to the surface roughness of the material. The surface roughness of a metal film is measured using the
RSOM and compared to values obtained with a stylus profilometer. The effect of focal position on 3D image construction
and defect detection is considered by examining several overlay structures.
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The relative simplicity of conventional optical microscopes makes them well suited to the role of automated
instruments for process control, but there are doubts about their ability to meet the demands of O.5m processes
because of insufficient resolution.
The resolution limit derived from the Rayleigh criterion is misleading when applied to the measurement of lines
on wafers, for which it is shown that measurement linearity can be achieved with feature sizes as small as O.3pm
by reducing the illumination wavelength below 450nm. The sensitivity of the instrument to changes in the shape
of O.3m and larger features caused by process variations can be reduced to acceptable levels by a careful choice
of measurement and focusing algorithms.
The measurement of overlay error requires careful choice of optical components and accurate alignment if
unacceptable systematic errors are to be avoided. Random errors can be minimised by using focused images and
eliminating shifts in the wafer position during the measurement. As a result, measurement repeatability of O.O2m
(three time standard deviation) and accuracy of better than O.O1m can be obtained with layer separations from
up to at least 4pm.
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The measurement cycle for practical accurate photomask linewidth
measurements is analyzed as a differential measurement- -the linewidth to be
measured is compared to a known linewidth on a standard photomask. The
linewidth measuring instrument is thus a comparator. The conditions necessary
for a valid measurement are discussed with regard to both the instrument and the
comparison process. The principles discussed here apply to many other types of
measurement as well.
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Is there enough contrast under white light illumination to perform
automated metrology on latent or undeveloped photoresist images for
control of the lithographic process? This would be an interesting option
for the next generation photolithograpy cell. To accomplish this under full
automation, several different operations must be carried out: global
alignment which requires a coarse focus and pattern recognition operation
at low optical magnification, pattern recognition and precision autofocus
at high magnigication, and finally precision edge detection at high
magnification all at repeatabilities acceptable to the industry. The first
look answer is yes.
Below we describe the experiments and data carried out on this question.
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In this paper we present a class of nonlinear adaptive filtering schemes to detect edges to the
nearest pixel in digital images. These one- or two-dimensional filters are adapted by training to a
subset of image data to produce peaked output at user-specified edge locations within the image. A
nonlinear adaptive algorithm has been developed and has shown improved performance over standard
cross correlation schemes in binary classification situations. The resulting filters are then applied
non-adaptively to the entire image set, and signal peaks within the image are detected to produce a
binary edge map. A short theoretical development of the algorithm is given, and results for images
representative of harsh alignment conditions are presented.
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Results of recent Investigations uncovering significant
errors in overlay (O/L) measurements are reported. The two major
contributors are related to the failures of symmetry of the
overlay measurement tool and of the mark. These may result In
measurement errors on the order of 100 nm. Methodology based on
the conscientious verification of assumptions of symmetry is
shown to be effective in identifying the extent and sources of
such errors. This methodology can be used to arrive at an
estimate of the relative accuracy of the O/L measurements, even
in absence of certified O/L reference materials. Routes to
improve the accuracy of O/L measurements are outlined and some
examples of improvements are given.
Errors in O/L measurements associated with the asymmetry of
the metrology tool can be observed by comparing the O/L
measurements taken at 0 and 180 degree orientations of the sample
in reference to the tool. Half the difference of these
measurements serves as an estimate of such tool related bias in
estimating O/L. This is called tool induced shift (TIS). Errors
of this kind can be traced to asymmetries of tool components, e.
g., camera, illumination misalignment, residual asymmetric
aberrations etc. Tool asymmetry leads to biased O/L estimates
even on symmetric O/L measurement marks. Its impact on TIS
depends on the optical properties of the structure being
measured, the measurement procedure and on the combination of
tool and sample asymmetries. It is also a function of design and
manufacture of the O/L metrology tool. In the absence of
certified O/L samples, measurement accuracy and repeatability may
be improved by demanding that TIS be small for all tools on all
structures.
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The automation of visual inspection in semiconductor wafer processing is a very challenging task. In this paper we address the automatic description and measurement of surface textures in semiconductor wafers. Texture plays a critical role in inspecting surfaces that are produced at various stages in the inspection of semiconductor devices. In this paper we describe a novel scheme to characterize surface textures that arise in semiconductor wafer processing. The emphasis in our scheme is on quantitative measures that allow for accurate characterization of surface texture. The fractal dimension is a quantitative measure of surface roughness, and we have developed an algorithm to automatically measure this. We also present an algorithm to compute the orientation field of a given texture. This algorithm can be used to characterize defects such as 'orange peel'. Furthermore, we have used the qualitative theory of differential equations to devise a symbol set for oriented textures in terms of singularities. An algorithm has been devised to process an image of a defect and extract qualitative descriptions based on this theory. We present the results of applying our algorithms to representative defects that arise in semiconductor wafer processing.
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In recent years autcinatic defect detection systems have been used to detect the
presence of sub-micron defects in semiconductor devices . The analysis of the
defects has been traditionally performed off-line and delegated to trained fab
personnel using semi-autcmatic review systems . The purpose of this paper is to
report on the development of an in-line autcmatic classification capability, which
will be used in conjunction with an automatic defect detecticn system. The
technology to be discussed in the paper is based upn reflected light microscopy,
digital image processing techniques and unique algorithms . Definiticns of
classification, as applied to semiconductor multi-level patterned wafers, will be
presented . The schema developed for a unique set of examples will be discussed.
The paper will conclude with a discussion of the limitaticns of the approach and the
directicns for future development.
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This paper presents a fully automated inspection system answering to the growing need of in-process wafer control
After a brief description of the mechanical, optical and image processing parts, we sum up our inspection method based
on a robust and fast image comparison . One image is obtained directly from the die to inspect through an optical
microscope . The other one may be:
- the corresponding site on the neighbouring die ( die to die strategy)
- areference image extracted from aleamed defect free library ( die to reference strategy)
- a synthesized image from the CAD database ( die to database strategy)
We give then some results for three functions of this system:
- reticlequalification
- defect density measurement on patterned wafers
- control of die critical sites
Defect localisations are memorized, and an interactive reviewing software allows to observe these defects with
various optical conditions (magnification, wavelength, focus...).
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This paper describes new database inspection technologies for pattern inspection of ULSI 5x reticles. An improved
inspection system architecture which addresses three important factors: sensitivity, data volume, and inspection
throughput is studied. To improve defect detection sensitivity, the high resolution optical images which are captured by
the inspection system are enhanced using programmable finite impulse response filters. New defect detection
algorithms are utilized. Increased resolution is also incorporated in the database images. Higher resolution database
images are especially effective in improving sensitivity and reducing false detections in small pattern geometry. The
database format has also been optimized to minimize the disk storage requirements and network file transfer time. The
new database generator is capable of expanding compacted data and creating grey level bit mapped images in real time.
Experimental results are reported using actual 5x reticle inspection results and simulated reticle data for ULSI chips,
such as 64Mbit DRAM and l6Mbit SRAM. The results indicate that 5x reticles can be inspected for O.3im defects
with an acceptable level of false detections and throughput that is comparable to eleciron beam write times.
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As critical dimensions on VLSI circuits are reduced below one micron, growing competitive pressures
increase the importance of rapidly reducing and maintaining low defect levels. Conventional methods
of analyzing process defects rely heavily on analysis of completed product and in-process particle
monitors to control defect density and provide data to guide yield improvement efforts. Because the
rate of yield improvement and the response to fluctuations in defect density are critically dependent
upon the timeliness and accuracy of defect data, more advanced methods of in-process analysis must
be used to detect and isolate process defects.
Automated defect inspection, when used in conjunction with end-of-line failure analysis and other
in-process defect monitors, provides a timely and accurate measure of process defects. An effective
defect reduction program, utilizing automated inspection, includes efforts in both the control of
process excursions and the reduction of baseline defect density. Control of yield limiting defects can
be supported through the application of SPC techniques to monitor process defects and rapidly detect
excursions in defect density when they occur. To identify the source of yield limiting defects and
guide yield improvement efforts, inspection of wafers at sequential locations in the manufacturing
process can be used to accurately and quantitatively locate the source of random defects. This paper
describes the use of automated defect inspection, as part of a comprehensive yield improvement
program, to facilitate both the detection of process excursions and the isolation of defects to a
specific process step.
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Yield of submicron bipolar chip mounted on a supercomputer has been dramatically
increased by the use of a 5-step experimental procedure. The procedure uses data
provided from electrical test, automated defect inspection, SEM (Scanning Electron
Microscope) and EPMA (Electron Prove Microscope Analysis) to characterize and
eliminate killer defects. Yield improvement was quantified and compared to theoretical
expectations.
Introduction
With higher packing density and bigger chip size, rapid yield enhancement becomes more
critical.1 At the same time, defects impacting yield become more difficult to identify
and eliminate. The most. difficult step in the yield improvement procedure is frequently
the isolation of the defect source. More advanced methods of defect detection, data
analysis, and compositional analysis are required to quickly eliminate killer defects in
the submicron manufacturing environments of the 1 990's. Successful isolation of the
source of killer defects, called defect source analysis, is a critical step leading to quick
yield improvement.
In this paper, a defect reduction procedure has been applied to a submicron bipolar
device mounted on a supercomputer. The device has four aluminum interconnection
layers, and a trilevel resist process is applied to the layer formations. A procedure is
described using the following five step experimental design.
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During past years a lot of efforts were put from several authors in order to approach the problems
related to reticle defect printability. Several works analized the physical phenomena affecting the mask
imperfection reproducibility and recently it was showed that the impact of reticle defects eeems to
increase by going from micron to submicron lithography. The goal at the base of the present work has
been to verify these hypothesis by starting from the experience collected in the previous works and by
designing targeted experiments in order to classify the real critical impact of the possible important
factors.
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Advanced, automated wafer flatness characterization systems allow flexibility in emulating lithographic systems.
Other considerations related to the interaction of an individual characterization system with a lithographic application
are becoming more critical with shrinking device geometries. Specifically, all automatic flatness characterization
systems use an array of discrete, sampled data points across the surface of the wafer. This paper will show
that the definition and location of these points influences the measured site flatness. Situations leading to error are
modeled. A distinction is made between the sample array (the points at which data is acquired) and a second
analysis array (derived from the first) used for calculation of the site flatness. It is shown that, assuming the sample
array meets the Nyquist criteria for the wafer topography of interest, the analysis array may be optimized for that
application. Results from measurements made on typical polished wafers are related to the models. A strategy is
presented for optimization of the analysis array.
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Refractive index variations of film materials are measured using a spectral micro-reflectometer, the Tencor®
TF-1. The principles of thickness and refractive index determination are discussed. An effective medium model of film
materials is applied to calculating refractive indices and their wavelength dependence. Refractive indices for typical
poly-crystalline silicon are given. Compositional and structural inhomogeneities cause refractive index variations.
Neglecting these index variations leads to misinterpretation of film thickness measurements.
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One of the main goals of process engineering in the semiconductor industry is to improve wafer fabrication productivity
and throughput. Engineers must work continuously toward this goal in addition to performing sustaining
and development tasks. To accomplish these objectives, managers must make efficient use of engineering resources.
One of the tools being used to improve efficiency is the diagnostic expert system. Expert systems are knowledge
based computer programs designed to lead the user through the analysis and solution of a problem.
Several photolithography diagnostic expert systems have been implemented at the Hughes Technology Center to
provide a systematic approach to process problem solving. This systematic approach was achieved by documenting
cause and effect analyses for a wide variety of processing problems. This knowledge was organized in the form of
IF-THEN rules, a common structure for knowledge representation in expert system technology. These rules form the
knowledge base of the expert system which is stored in the computer. The systems also include the problem solving
methodology used by the expert when addressing a problem in his area of expertise. Operators now use the expert
systems to solve many process problems without engineering assistance. The systems also facilitate the collection of
appropriate data to assist engineering in solving unanticipated problems.
Currently, several expert systems have been implemented to cover all aspects of the photolithography process.
The systems, which have been in use for over a year, include wafer surface preparation (HMDS), photoresist coat and
softbake, align and expose on a wafer stepper, and develop inspection. These systems are part of a plan to implement
an expert system diagnostic environment throughout the wafer fabrication facility.
In this paper, the systems' construction is described, including knowledge acquisition, rule construction,
knowledge refinement, testing, and evaluation. The roles played by the process engineering expert and the knowledge
engineer are discussed. The features of the systems are shown, particularly the interactive quality of the consultations
and the ease of system use.
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Integration and automation have gained more and more ground in modern IC-manufacturing.
It is difficult to make a direct calculation of the profit these
investments yield. On the other hand, the demands to man, machine and technology
have increased enormously of late; it is not difficult to see that only by means of
integration and automation can these demands be coped with. Here are some salient
points:
U the complexity and costs incurred by the equipment and processes have got
significantly higher
. owing to the reduction of all dimensions, the tolerances within which the
various process steps have to be carried out have got smaller and smaller and
the adherence to these tolerances more and more difficult
U the cycle time has become more and more important both for the development and
control of new processes and, to a great extent, for a rapid and reliable
supply to the customer.
In order that the products be competitive under these conditions, all sort of costs
have to be reduced and the yield has to be maximized.
Therefore, the computer-aided control of the equipment and the process combined with
an automatic data collection and a real-time SPC (statistical process control) has
become absolutely necessary for successful IC-manufacturing.
Human errors must be eliminated from the execution of the various process steps by
automation. The work time set free in this way makes it possible for the human
creativity to be employed on a larger scale in stabilizing the processes. Besides, a
computer-aided equipment control can ensure the optimal utilization of the equipment
round the clock.
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"Stepper seif-metrology" refers to measurements of various stepper parameters by the stepper itself, as opposed to
conventional metrology where resist patterns must be exposed, processed and measured. Seif-metrology enables
fully automatic feedback loops in which some stepper parameter, e.g. focus offset, can be accurately optimized
without operator intervention.
We consider a GCA ALS-200 stepper with .4NA I-line optics utilizing an INSITU stage artifact. The INSITU
signal is derived from a patterned chrome substrate which transmits light to a detector through some narrow slits.
The slits are rapidly swept through the fixed aerial image, and in less than one second a full signal profile is obtained
for both X and Y line images. Fully automated tests are available to optimize seven important stepper adjustments:
focus offset, baseline error (X and Y), lens trapezoid error (X and Y), reduction error and reticle rotation. Data
will be presented on the use of INSITU for routine stepper setup. In addition, detailed data will be presented on
the effect of lens heating on focus.
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This paper introduces a new wafer stepper on-line calibration sensor, the Image Sensor, which refers directly to the
aerial reticle image at the exposure wavelength. This sensor system is integrated with other stepper metrology
systems by a so-called Image Sensor fiducial plate, which interacts simultaneously with the aerial reticle image, the
Image Sensor, the TTL alignment system and the focus sensor of the stepper. An integrated software package
ensures on-line regular stepper calibration, eliminating dependance on environmental, process and time
parameters. Unique in this concept is the direct measurement of the consequence of wavelength drift in excimer
laser steppers by measuring the aerial image deformation at the exposure wavelength. This information is used as
a direct feedback to the wavelength control of the laser. Initial results of this system are presented for both UV (365
nm) and DUV (248 nm) steppers.
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A novel exposure monitor structure (EMS) is proposed as a sensitive
means to monitor or measure effective exposure dose in the optical
lithographic printing. Like windows of graduated transmittance, it is
very sensitive to dose, but not to focus. On the other hand, EMS is
compact to allow placement in the kerf or device layouts and it is
measurable by automated rctetrology tools.
EMS is built in the conventional reticles by arranging a set of
stripes of chrome and glass on the period near MTF cut-off in a manner
simulating transmission wedges on both sides of a conventional line.
Since the fine structure of EMS is not resolved by the optical lithography
tool used for printing, it performs like a transmission wedge.
Conventional linewidth measurements of a printed EMS image are used to
monitor exposure dose. Coupled with a calibration curve, sensitive
dose measurements can also be made.
Modelling of printing of EMS and of a conventional line on an optical
stepper indicates that printed linewidth of EMS changes much faster as
the function of dose. EMS also displays relatively little sensitivity
to defocus.
Conventional 5X reticles with EMS were built. Exposure sequences were
carried out on a G-line stepper. Linewidth measurements of printed
EMS and of conventional lines were done on a typical linewidth measurement
tool. Experiment confirms that linewidth of printed EMS is
much more sensitive to dose than that of a conventional line.
Once linewidth of EMS is established at the desirable dose, EMS may be
used to set that dose in the subsequent runs. With more accurate dose
set-up and job disposition decisions, higher product tolerance can be
achieved with existing equipment and process.
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Recent rapid progress in the semiconductor industry requires
much better accuracy for overlay. Today, the overlay accuracy of
0.1 pm is discussed in reality.
To guarantee the 0.1 pm overlay for all processes is one
target. In order to attain such requirements, the alignment
system has been renewed. We have developed a new TV image
processing system with high resolution, using real-time twodimentional
image processing technology by multi-computer system.
Together with TV system, the new alignment system by HeCd
and HeNe laser bright field method is implemented, and they
showed more extensive flexibility to various types of wafers.
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Poster Session: Special Topics in Photolithogrphy Process Control
Though simulations of PEB (Post Exposure Bake) on the basis of PAC diffusion
mode! have been carried out by a number of researchers '' (2)
, it has never
been confirmed that those could predict experimental data caused by PEB' s
effects accurately . Because no details of chemical reactions thernlly induced
by PEB are known, fundamental parameters which determine PEB' s effects must be
obtained experimentally. We have acquired the volume of changes of development
rate function, RATE(M) by PEB with DRM monitoring for some types of photoresist
. The values of diffusion length have been obtained by means of compareing experimental
B (exposure ener) vs T (development time to clear) curves with
simulated ones which is based on RATEOA) data. Their dependence on the baking
time has been investigated with fixed FEB temperature and it has been proved
that a progress of the diffusion saturates only in less than a few seconds
when the diffusion length is about lO'-l5ncn, which is much shorter than the
standing wave length(= 66nm, for G-line). Profiles of low contrast resist
patterns can be improved by the decrease in development rate of slightly exposed
areas by PEB. The effects on these resists depend on the baking time
because the volume of the decrease grows with increasing FEB time. On the other
hands, for high contrast resists PEB' s diffusion enhances their resolution
while the decreases in development rate have little effect on them. Time dependence
cannot be observed for these resists because the diffusion length
remains constant with increasing FEB time.
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Accurate technology projections are the key to any attempt to identify future product needs and technical
road blocks. For coat and develop, the goal is to be able to project resist thickness and develop uniformity
control requirements as device geometries shrink. In addition, it would be desirable to project the
temperature and exhaust control required to achieve a specific resist thickness control. This paper will
describe a new procedure for technology projections at coat and develop. It is based on a hierarchical
analysis of variance combined with simple physical models of resist properties.
Traditionally, people" have used an experimental approach to identify key variables. In these experimental
approaches, the process is treated as a "black box" to be investigated using statistically designed experiments.
These data tell the process engineer a lot about the current process. They do not help with technology
projections.
To project the future, some sort of model is needed. The model described here uses a "top down" approach
that starts from the desired line width control expressed in statistical terms.
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Just as the photolithography engineer has tools andmethods for identifying and correcting stepper alignment errors,
the defect reduction engineer needs tools and methods for identifying and eliminating process defects. Automated
defect inspection systems are becoming increasingly common in semiconductor manufacturing operations. It has
become accepted that they provide the quickest, most reliable method of identifying and reducing defect causes.
In addition to automated inspection systems, a sound inspection strategy is necessary. Techniques have been
presented by this author and others 1,2 describe a process of identifying defect types, isolating sources,
performing and verifying corrective action. A variety of inspection systems are available to implement these
techniques.
This paper examines the application of two automated inspection systems in a semiconductor fabrication line
producing two level metal, single layer polycide CMOS ASICS. Statistical methods for interpreting inspection
results and verifying defect reduction are also shown.
The results presented show the benefits of this approach. Device yield can be greatly improved, and critical
information about the variability and density of yield limiting defects in a fabrication process can be provided.
Scope
This report consists of two individual studies. In the first study, the processes of defect identification, source
isolation, corrective action, and verification are investigated on production wafers following the active area etch
operation. A patterned wafer laser scanning particle detection system is used to collect the data for these processes.
In the second study the initial step of defect identification is investigated on a polycide etch layer. Data from a
laser scanning paiticle detection system and a digital image processing system are analyzed.
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This paper docuitents a structur approach to defect elimination in
seiiiccructor processing. Classical problem solving techniques were used to
logically guide the defect rIuction effort. tfect infontation was gatherei using
an automated wafer inspection systeaii ar defects were classifi&1 by production
workers on a rete review station. This approach distiruishe actual causes from
several probable causes. A process change has reduc the defect mechanism.
This methodology was applied to ruce !IEFWN' perfluoroalkoxy (PFA) particles
in a one micron semiccructor process. Electrical test structures identified a
critical layer where yield loss was occurring. An audit procedure was establishi
at this layer arx defects were c1assifi into broad cateories. Further breakout
of defect t'pes by appearance was necessaxy to construct a meaningful Pareto chart
ard identify the xist fr&ijiently occurring fatal defect. The critical process zone
was segmented using autaat wafer inspection to isolate the step causing the
defect.
An IshiJcawa or cause-effect diagram was construct with input from process
engineers to outline all possible causes of the defect. A nest probable branch was
selected for investigation arxi pursued until it became clear that this branch was
not related to the cause. At this point, new ideas were sought from a sister
production facility. ring the visit a breakthrough irxicat& a different path
ar ultiltiately lead to identifying the source of the defect. A process change was
implemented. An evaluation of the change she1 a substantial decrease in defect
evel. rther efforts to eliminate the defect srce are in rogres.
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Automated defect inspection tools have been applied in a variety of applications and have proven to
contribute key information to successful defect reduction efforts.1 To effectively and efficiently solve
defect problems it is necessary to understand the sensitivity, capture rate, false event rate, and stability of
the inspection system. Without understanding these performance parameters the user is less able to
differentiate real process deviations from false ones. Consequently, it is more difficult to isolate the defect
source, cause, and optimum corrective action.
This paper presents a methodology for evaluating automated defect detection performance parameters
together with a test vehicle designed to simulate 4 and 16 Mbit circuit density. An example of practical
application ofthe methodology ispresented using both the testvehicle described andrepresentative product
wafers. Results are presented together with a discussion ofthe benefits and caveats ofusing a standard test
vehicle versus product wafers for evaluating automated defect detection performance.
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This paper deals with the problems of using a low voltage
scanning electron beam in a measurement instrument. Consideration
shall be given to surface charging and thin film materials,
condenser and objective lenses, filaments, scanning coil design,
scan generation systems, detectors, and outputs.The measurement
of geometries, methods of determining geometry edges, resolution,
magnification, focus, depth of focus, image rotation, and staging
necessary to locate the geometry to be measured will also be
discussed. Data are presented from fundamental research.
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The objective in making CD measurements at the develop inspect (DI) level is to infer the eventual size of the post etch pattern. Currently this is done by subtracting a factor, often referred to as an "etch bias", from the DI or resist measurement. However, as geometries have grown smaller and design rules have tightened, this technique has proven unreliable. This is due, in part, to variations in the resist side-wall slope from pattern to pattern. Given two resist lines of equal base width, the line with a relatively steep slope will render a wider line at final inspection than a line with a lesser slope. In such cases, use of fixed etch bias factors has obvious drawbacks. The ability to analyze the topographical proffle of resist materials, in a non-destructive manner, is vital in determining the effective width of the resist line. An algorithm has been developed which, given a secondary electron video proffle, can characterize resist side-wall slope as well as measure line width. Combining this data with the final-inspect CD measurement from the same site, and repeating the process on multiple sites and multiple wafers, a relational trend between slope and etch bias (see fig 1) can be described. Using this data, it is possible to generate a dynamic etch bias which will change depending on variations in resist side-wall slope.
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Precise and accurate feature positioning in SEMs is becoming more critical. Moving the stage to a predetermined location
must be done with accuracy and precision that put the feature ofinterest in the field ofview at a magnification high enough
to detect orrecognize the same feature. Ifthis is notdone, some sort ofsearch, either automatic ormanual must be performed.
This may not only be bothersome, but detrimental to inspection or measurement throughput performance. Ultra precise
stages - for example, those using laser interferometers or linear encoders - are capable of positioning precisions, if not
accuracies, to 0. 1 micron. In both optical and SEM systems where inspection is normal to the plane ofthe waler(cailed zero
tilt), precise locating of features is possible without serious attention being paid to the bow or warp of a wafer. From the
SEMI Standards Manuals, it is seen that a 200 mm wafer may have up to 65 microns of bow. In optical lithography tools
and optical inspection or measurement systems, a vacuum chuck may alter or reduce the bow. However, in the vacuum
chamber of the SEM this technique does not work. The bow or warp remains. The problem occurs in going to a particular
numerical address whenthe waferis tilted, ifthat numerical address was determined at some different tilt -themost probable,
of course, being zero iilt. Tilting of the wafer will cause the initially observed feature to move through an arc of "unknown"
extent (unknown because it is a function of the bow and the bow is not known at that point). A 60 degree tilt of awafer
with 40 microns of bow can cause about 35 microns oflaten.l displacement of a feature from where it would be expected
for a wafer with no bow. The effect of this displacement on detectability is discussed. Actual displacement measurements
on a 125 mm wafer ait plotted. These plots are compared with those derived from measurements made by optical and SEM
systems specially set up to measure bow magnitudes. Bow-magnitude data obtained from a separate bow-measuring
insirument or from data taken in-situ in the SEM itself can be used to correct the positioning error that would occur with
that particular wafer. Bow related effects may be a practical limitation on the open-loop positional precision capabily of the
SEM at non-zero tilts.
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The inadequacy of the stuck-at fault model has been well aired and documented.1 ,2All studies agree that this model does not
reflect the physical failures of real devices,3 principally because such failures do not exhibit a 1 : 1 mapping onto the logic
domain.2 ,4 Circuit layouts which are based on stick diagrams do however reflect the physical domain in sufficient detail to
enable both structural defects, together with shorts and opens in metallic and non-metallic domains, to be detected and
located. The author has proposed the adoption of a novel method which processes information obtained from a scanning laser
beam reflected from a surface profile. Scanning may be of a raster nature over the surface, or follow a suitable path search
along layouts. The latter search type has been simulated in PROLOG using breadth-first (BRFS), Euler (ES), and neighbourfirst
(NFS) searches. It is suggested that by creating and modifying an acquired-knowledge database (AKDB), according to
defect occurrence, it is also possible to search those regions where defects may be present in order of decreasing probability.
Thus a useful library of the distribution of defect density statistics would be created by virtue of this proposal. The paper concludes
that it is feasible to both detect and locate layout defects according to a prescribed range of defect size. The AKDB
can be monitored to compile statistical knowledge of both uniformity of structure and defect occurrence, thus raising the
yield figure and reducing cost. Such a topological approach to the testing problem offers a test structure for exploitation
which is technology independent, relatively fast, adaptable to parallel processing, and may be interfaced with machine vision
systems.
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In any process that generates or measures pattern-placement (overlay), these parameters need to be
regarded at least as two-dimensional. We show this on our procedure bringing a mask repeater under statistical
process control SPC).
In order to increase the accuracy of the overlay measurement process itself, plate bending has to be
included as a third dimension. By taking the third dimension into account, the LMS 2000 Metrology System
significantly reduces the maximum uncertainity of measurement results.
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Environmental changes in temperature, humidity, and pressure affect registration repeatability and accuracy.
Laser wavelength compensation electronics can reduce the effects of environmental fluctuations but not totally
eliminate them. When measuring distances as large as 120 mm to an accuracy of less than 50 urn even slight variations in
temperature and pressure will have adverse effects on registration repeatability and accuracy. Therefore, careful control
and monitoring of these factors is essential in maintaining a stable two dimensional measuring system.
In order to access these effects, parts of the environmental control system have been deactivated and the effects
observed. By correlating temperature, pressure, and humidity with fluctuations in output data, it is possible to identify
and characterize their individual effects. The magnitude of influence of each component varies with amount and duration
of change versus the system's ability to respond. Laser wavelength compensation effectiveness can be evaluated by
measuring oulput data changes versus environmental changes with and without the compensation system activated.
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The Laser Interferometric X-Y Measuring System Model XY-21 has been used
around the world for many years as the standard machine of measuring coordinate
of reticles and masks for IC and LSI. However, indications are that the
capability of the XY-2I may not be sufficient to match the ever increasing
trend toward ultra large scale integration (ULSI).
In response, we have recently developed a successor to the XY-2I,the Laser
Interferometric X-Y Measuring System Model XY-3I. The new system is designed to
meet the requirements of the ULSI era.
The XY-3I enables very accurate, full automatic measurement of pattern
coordinate on masks and reticles, as well as the critical dimension (CD). The
system can handle the patterns on the wafers equally well, with the
capabilities of highly accurate measurement of coordinate position, CD and
overlay registration of pattern. An additional feature of the XY-3I is bow
compensation, which decreases fluctuation among measurement data due to bow
change of sample.
This paper presents the improvements, new functions, performance and
applications of the XY-.3I.
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Submicron photolithographic processes present significant manufacturing challenges
due to the relatively small process windows often found with these technologies. Small
upstream variations in the pre-expose portion of the photomodule or subtle radial
variations in the imaged layers reflectivity can result in final critical dimensions which
are outside of the desired specification.
One important parameter which has been found to significantly impact the final critical
dimension is film reflectivity. This parameter is difficult to control and is a function of
the optical characteristics of the layer being imaged, its thickness, and the resist
thickness. In our process, improved poly silicon CD control was sought for a 0.8 jim
process. Resist and poly thickness were investigated and optimal thicknesses determined.
Poly CD control improved as a direct result of this optimization process.
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Poster Session: Special Topics in Photolithogrphy Process Control
The development phase of the optical photolithography process has long been considered the most crucial, as it is
the final image-forming step. Process monitoring methods have focused primarily on end point detection, and have
not used other inferable on-line information. This paper examines the use ofinathematical models in conjunction with
on-line development penetration data to determine process changes. An on-line sequential parameter identification
scheme is used to calculate a current rate parameter value for the development model, and a Kalman filter is used to
reduce erroneous observations caused by measurement noise. A powerful development monitor system results from
the combination of real-time data and on-line parameter and state estimation theory.
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The ultraviolet range of wavelengths, 200 -400 rim, hold considerable promise for improved measurement and characterization of certain thin films on wafers. In this region of the spectrum, small differences in chemical composition and variation in the optical constants of materials can produce important differences in the reflectivity. These can be observed by using a high sensitivity microspectrophotometer system. It is also well known that small differences in the composition and structure of metallic and semi-metaffic surfaces will cause pronounced differences in ultraviolet light reflectance. The visible-near infrared wavelength range from 400 - 900 rim has been well exploited for many years by the use of computerized microspectrophotometer systems (See Notes 1 , 2and3)designed to measure reflection spectra and mathematically calculate thickness and other properties of films. Many thousands of these units have been installed in wafer fabrication facilities throughout the world, and they are in routine use for film thickness production control. The present paper will not dwell on the well-known capability of these systems. In recent years there has been new research into and development of improved photolithography systems which use deep ultraviolet light to expose photoresist patterns on wafers. Deep ultraviolet radiation is generated for these systems by excimer laseis which emit wavelengths near 250 nm, and in other designs by quartz mercury lamps which produce a strong emission line also near 250 nm. In order to characterize sublayer surfaces below the photoresist to achieve known and reproducible reflectance which can affect exposure time, it will be necessary to measure and control reflectance and absorption of fihns produced by chemical vapor deposition, metallization, or other means.
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Results are reported on the use of the in-situ differential scanning
electron microscope in precision micro-metrology of submicron
features. It is shown that the technique is capable of providing
remarkably stable linescans across etched silicon patterns partially
covered with silicon dioxide on the surface. Results are also
presented on the metrology of photo-resist, showing relative signal
stability even in presence of charging effects. An important ability
of the technique, namely its inherent capability to effect an
ob5ectively defined alignment of the samples, is extensively utilized
in this regard.
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193 run excimer laser photo-ablation of kerf patterns offers a non-destructive
Method of characterizing high-aspect-ratio vias in resist and polymer stacks, for
process control and potential rework decisions. Current optical and SEM approaches,
including tilt-stage, do not offer sufficient information as diameters approach
0.5 urn in 1 urn thick stacks.
Unlike the double-exposed photo-cleave method described by Yang, et al, this
technique sections isolated vias after developing, representing actual product
structures. Tilt-stage SEN inspection is then used to observe the details of the
contour, to assure complete opening and proper dimensions.
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A novel laser scatterometer linewidth measurement tool has been developed for the CD metrology of
photomasks. Calculation of the linewidth is based on a rigorous theoretical model, thus eliminating the need
for any calibrations. In addition, the effect of the glass slab on which the grating is placed, is explicitly taken
into account. The experimental arrangement consists of a chrome-on-glass diffraction grating illuminated with
a converging spherical wave from a He-Ne laser. A photodiode mounted in the Fourier plane of the scatterer
measures the scattered power in each diffracted order. A rigorous theoretical model is used to provide a
lookup table giving the 0-order transmitted power as a function of the linewidth for a fixed pitch of the grating.
This table is then used to associate a linewidth with the experimentally measured value of the power in
the 0 transmitted order.
A local company manufactured various photomask gratings having a 2 micron pitch and varying
linewidths. The 0-order transmitted power for each of these gratings was measured by the scatterometer, and
a prediction of the linewidth was made based on the theoretical model. The linewidth measured by the scatterometer
system represents an average of the linewidths over the total lines illuminated by the laser. All
present CD measurement systems however, measure the linewidth of a single line. If the variation of
linewidth is assumed to be small, comparable results should be obtained from the two procedures. The
predicted linewidth values were compared to those obtained using commercial optical linewidth measurement
systems and excellent agreement was obtained.
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A new version of the Stepper Image Monitor (SIM) has been designed to evaluate best focus on Ultratech steppers.
The SIM is a portable unit which will support a number of steppers in a fab. Each stepper has a permanently mounted
detector assembly which uses a mirror to pick off the dark field image (except for a small portion required for Ultratech
alignment) above the fold mirror.
To run SIM, a chrome on glass amplitude diffraction grating with many 1 - 1.Sum wide by 1mm long windows on a Sum
pitch is placed in the reticle position on the stepper. A SIM wafer with a similar number of 03 - 1.Oum wide by 1mm
long bars on a Sum pitch is placed on the stage. The wafer is instructed to move by an external Run Mode 8 Ultratech
stepper program, first in X and then in Y, across the Sum pitch in a number of discrete steps (typically 20). The intensity
values measured by the SIM detector at each step are used to construct a discrete intensity profile that represents the
aerial image of the grating. This procedure is repeated at several Z positions (typically 5). Each intensity profile is
correlated to the appropriate diffraction limited intensity profile for the system being used. A parabolic fit is made from
the correlation values at the various Z positions. The Z value for the maximum of the parabola is considered to be best
focus.
This method has several advantages over other methods currently in use for checking Ukratech focus: (1) More precise
measurement; (2) Operator independent; (3) Faster; (4) No effects due to the resist or to processing; (5)SIM is a
permanent artifact (i.e. no variation due to wafer differences).
Results from beta site testing show that the method is very repeatable, with sigma =0.lSum being typical. SIM results
also correlate very well to results obtained by conventional methods. It also tracks well to changes in Z offset dialed into
the stepper. SIM has been shown to be an effective tool for quantifying the relationship between lens heating and focus
shift on the Ultratech stepper.
These improvements in speed and precision of focus measurements on the Ultratech stepper will lead to more usable
stepper time and better stepper performance, which in turn translates directly into more throughput and higher yields.
OAI would like to acknowledge the help of Suzanne Scullen and Synergy Semiconductor Corporation for their help and
the use of their Ultratech stepper.
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Poster Session: Special Topics in Photolithogrphy Process Control
New test structures for the electrical measurement of overlay using the Prometrix
Lithomap LM2O have been designed. These have been extensively used to assess the
performance of Canon FPA 1550 step-and--repeat alignment instruments. Results indicate
that 98 % of the measured sites are within alignment tolerance of +1- 0.4 microns.
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Photolithography variables that are still uncontrolled include
time between softbake and exposure, time between exposure and
develop, relative humidity, and exhaust uniformity. Even if all
other variables are in perfect control, these can cause enough
variation to put sub-micron CDs out of spec. Changing exposure
energies cannot fully compensate. The use of in-situ develop end
point control can eliminate CD variance caused by these and other
process variations.
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