This PDF file contains the front matter associated with SPIE Proceedings Volume 12811, including the Title Page and Table of Contents.

The drive toward ICs with increased speed, higher levels of integration, and lower power consumption, and the increased demand for ASICs have and will continue to define new challenges for the maskmaking industry. Maskmakers are being asked to produce increasing numbers of 5X reticles with ever shorter turnaround times. And, they are being asked to accomplish this with bigger pattern files, higher placement precision, and smaller address grids. This challenge is difficult to meet with electron beam systems. Bigger pattern files, higher placement precision, and smaller address grids increase reticle writing time, and the batch operation of e-beam systems and the relatively long e-beam resist processing sequence combine to further lengthen the turnaround time. This paper will describe the CORE-2000's data handling architecture and its unique writing strategy. The basic raster scan writing strategy of the CORE-2000 has been enhanced by image processing techniques commonly used in the graphics industry to allow 0.1 urn address data to be written without decreasing the system's throughput. The impact on turnaround time of the CORE-2000's serial process flow and optical resist processing will also be discussed.

Electron Beam Lithography has emerged as the predominant tool for high accuracy maskmaking. Two basic types of systems have been developed over the past twenty years for maskmaking operation: Raster scan - spot beam systems such as the MEBES system manufactured by Perkin-Elmer and vector scan shaped beam systems such as the internally used EL series developed by IBM or the JBX-6 series produced by JEOL. In the United States the MEBES system clearly has been the more widely used type for maskmaking. Whereas in Japan, both types of systems are used extensively. Traditionally, the major concern regarding the use of a shaped beam system has been the large volume of pattern data created in transforming CAD data to the E-Beam Scanner format. This problem resulted in extremely long conversion times and because of the large amount of pattern data, long transfer times limited the acceptance of these systems. If these problems could be overcome, the machine accuracies and throughput speeds of the two types should be equal and in some cases the shaped beam vector scan system exceed the performance of a raster scan system for reticle generation. The remainder of this paper will describe improvements made in the JEOL system whereby pattern data is translated into machine format by hardware at the time of write as opposed to preprocessing of the data in software. The resultant improvements in system performance will be described and compared to a raster scan system.

With the rapid progress of high-precision reticle process technology, trial production of 4M DRAM and 16M DRAM memory chips has already started, as has mass production of 1M DRAM chips. The progress of microlithographic technology that has made this possible has improved process resolution from l um to 0.5um and now to 0.2um to 0.3um. These advances are largely due to better pattern-forming steppers, which have been improved by turning lenses to high NA, using shorter wavelengths (such as the i-line instead of g-line), and use of the excimer laser. Improved materials and processes — better resist and developer, CEL (Contrast Enhanced Layer), a new multi-layer resist technology, and the spread of simulation technology — have all helped the development of submicron pattern technology. In the patterning of the stepper, the reticle is a negative. Reticle provide various magnification such as 10X, 5X, IX, but the 5X reticle is the current choice. The reticle is usually used to make CAD design data with electron beam exposure equipment but, for the submicron patterns as described above, the reticle requires a precision like master mask precision of +/- 0.1um, nil independent defect of 0.5um and intrusion and protrusion of less than 0.2um. In making reticle, a quartz glass substrate is generally used on which Cr is coated and exposed to electron beam. But because of the use of such easily chargeable materials as glass and resist, precision and position of pattern cannot be guaranteed. The present study is made from the standpoint of process technology to investigate charging prevention and heat in reticle making. Although many studies have been done on charging of resist in electron beam exposure, little progress has been made regarding mask processes. This is the reason for the present study of making high-precision reticles.

An overview of Microelectronic Engineering at the Rochester Institute of Technology (RIT) is given with an emphasis on current IC fabrication projects utilizing emulsion masks. Laboratory experiences in chemical processing of emulsion masks, characterization of photoresists, fabrication of Chrome masks, and studies of advanced photolithographic techniques such as tri-layer resist systems and silylation are also presented. Research activities and plans for a CMOS process at RIT, coupled with industry advances necessitate continual improvement in the photolithographic capabilities at RIT.

The sensitivity of conventional EBR-9 was improved by changing the molecular structure of the polymer. This new resist was named EBR-9 HS30, the HS standing for high sensitivity. The sensitivity of EBR-9 HS30 is higher than EBR-9 by 3-4 times which means this resist can be used by MEBES at 1-1.6 uC/cm² dosage. The pre-baking method is a key point in the resist process to provide good critical dimension uniformity. Another characteristic of this new resist is the stability after pre-bake and exposure. Practically no sensitivity change was observed after pre-bake and exposure. This paper will present fundamental data of EBR-9 HS30 and some preliminary evaluation data of mask making by courtesy of DNP (Dai Nippon Printing Co.).

Over the years, integrated circuit complexity has increased rapidly, particularly in circuits with high internal repetition, such as memory devices. With increasing circuit complexity comes an increase in the size of the database required to describe, write, and inspect these circuits, whether on the mask, reticle, wafer, or wafer substitute. This increased database size has dramatically increased the processing time required for the data conversion databases have effectively managed the database size problem in the design community and E-beam writing systems offer either data compaction or job deck compaction as well. Until now, database inspection systems have lagged behind design and writing systems in their ability to handle large databases of repetitive information. This paper describes a solution to this problem and reports on its effectiveness for reducing data conversion time and inspection database size for a variety of real IC databases.

GMC is a random amorphous co-polymer of glycidyl methacrylate and 3- chlorostyrene. The material functions as a negative acting (cross-linking type) electron beam resist. Its sensitivity, defined as the dose necessary to gel 50% of the initial film thickness (D_q^0.5), is 1.5 and 3.1 uC/cm² @ 10 and 20 kV, respectively. No post exposure curing is required for device codes that allow line-width tolerances of > +/- 0.10 um. A methodology has been developed for determining a thermodynamically marginal developer (solvent) which minimizes swelling of the defined features, and improves process control associated with the spray/spin development step. The use of this method has led to an improvement in resolution over that obtained with conventional 2-component developers. Vertical 0.75 um line and space patterns are routinely delineated, and features in the 0.5 um range can be obtained. The material exhibits enhanced dry etching resistance when compared to methacrylate based (OOP, PGMA) negative resists, and is compatible with both wet and dry etching methods utilized in the patterning of the chromium layer. Production scale quantities are not routinely produced. A batch to batch comparison of the critical molecular and lithographic properties indicates deviations of < 5 percent. Statistical data derived from product related IX photomasks reveals an average calculated line width uniformity (3 sigma) and line edge roughness (6 sigma) of 0.027 um and 0.064 um, respectively. This represents 100% improvement in feature size quality, and control over COP, and is equivalent to that observed with PBS patterned masks. Pinhole defects are virtually nonexistent, and defect densities under 0.2/cm² are observed.

This paper will discuss the use of the Perkin-Elmer virtual address package as part of a standard production environment. This package has been used for over a year as an add-on option to a 40 MHZ MEBES III. During this period, virtual addressing has been used for standard IX Projection Aligner mask production as well as in a mix and match mode for ULTRATECH reticle production where pattern files consisting of .125u address virtualed up to .25u are stitched into the same field as pattern files with normal .25u and ,50u addressing. Data will be presented comparing the process parameters, resulting edge definition and dimensional control for VIRTUAL and NON-VIRTUAL addressed patterns.

Data preparation and management for mask manufacturing has become an unusually complex problem. Growth in data processing time per mask level increases the sensitivity to error rate. Growth in numerical control data volume drives the value of automated data storage management. Post processing for multiple writing and inspection tools to meet an aggressive manufacturing schedule has created the need for a completely automated data management system.

This was a presentation on the perspective on maskmaking for 1988.