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After the introduction of multi-patterning techniques like multiple Litho-Etch (LEn ) steps and/or Spacer Assisted Double/Quadruple Patterning (SADP/SAQP), the amount of masks required to produce a semiconductor device has increased significantly. The main reason was that a functional layer could no longer be exposed in one single litho step due to the elevated pitch requirements. Consequently, the required pattern had to be split-up and divided over multiple masks. One can imagine that this has put a huge constraint on the mask-to-mask on-product overlay requirements and control. It was already shown before that for the LE2 use-case the mask-to-mask contribution is the second largest contributor (after the scanner) to the overall on-product overlay. In order to keep the on-product overlay within specification over time, the number of on-wafer overlay metrology steps inside the fab increased even more. Since more masks are used per layer, multiple combinations are now possible to measure and control both the intra-layer as well as the inter-layer overlay. As a consequence, the increasing number of metrology steps has resulted in a negative impact on the overall wafer/lot cycle time in the fab. It would be beneficial to fully characterize the mask-to-mask overlay off-line and apply computational overlay techniques to compute the on-wafer overlay. This enables smart metrology sampling to address and reduce the overall wafer/lot cycle time inside the fab. In this work, we performed a correlation study between off-line mask-to-mask registration metrology and on-wafer measurements. The off-line overlay measurements were performed on a PROVE® tool while the exposures and scanner readouts were executed on an ASML TWINSCAN™. Two ASML qualification (BaseLiner) masks were used for this purpose. Extensive off-line registration measurements were performed on both reticles including the reticle alignment marks as well as the image field metrology features (gratings). We show an excellent correlation between the measurements on the PROVE® tool and the on-wafer results reaching R2 < 0.96 with an accuracy of 0.58-nm. The accuracy is determined by the reticle alignment accuracy on the scanner and the quality of the masks. We have identified the underlying contributors to the error budget to enable a further improvement of the correlation between the mask-tomask and the on-wafer overlay. Since the results of this first investigation were so promising, the effect of a pellicle mounted on one of the masks was studied as well. The off-line mask-to-mask registration metrology was repeated and the resulting computational overlay has been compared with the on-wafer results.
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