Integrated photonic computation accelerator based on a cascaded array of Mach-Zehnder interferometers

Wenhao Wu; Hanling Long; Jianbo Wang; Yi Zhang; Hui Yu; Chengsheng Wang

doi:10.1117/12.2624710

27 March 2022 Integrated photonic computation accelerator based on a cascaded array of Mach-Zehnder interferometers

Wenhao Wu, Hanling Long, Jianbo Wang, Yi Zhang, Hui Yu, Chengsheng Wang

Proceedings Volume 12169, Eighth Symposium on Novel Photoelectronic Detection Technology and Applications; 1216967 (2022) https://doi.org/10.1117/12.2624710
Event: Eighth Symposium on Novel Photoelectronic Detection Technology and Applications, 2021, Kunming, China

Abstract

Artificial neural networks have dramatically improved performance for many data processing tasks, including speech and image recognition. Today’s hardware based on von Neumann computering scheme is inefficient at implementing multiply-accumulate operations in neural networks. To tackle this issue, several kinds of electronic architectures have been developed, including GPU, FPGA and ASICs. However, with the gradual end of Moore's law, these architectures still encounter bottlenecks in terms of computation speed and power efficency. Recent years, optical computing technology has attracted much attention for its large bandwith and low latency, and significant effort has been made. Here we propose an integrated photonic chip that is capable of accelerating multiply-accumulate operations. The chip contains a cascaded array of 16 Mach–Zehnder interferometers which can be programmed to perform arbitrary 4×4 matrix. The theory simulation results of the device design are demonstrated.

Citation Download Citation

Wenhao Wu, Hanling Long, Jianbo Wang, Yi Zhang, Hui Yu, and Chengsheng Wang "Integrated photonic computation accelerator based on a cascaded array of Mach-Zehnder interferometers", Proc. SPIE 12169, Eighth Symposium on Novel Photoelectronic Detection Technology and Applications, 1216967 (27 March 2022); https://doi.org/10.1117/12.2624710

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