Paper
1 July 1990 High-speed architectures for morphological image processing
Alexander C. P. Loui, Anastasios N. Venetsanopoulos, K. C. Smith
Author Affiliations +
Proceedings Volume 1247, Nonlinear Image Processing; (1990) https://doi.org/10.1117/12.19605
Event: Electronic Imaging: Advanced Devices and Systems, 1990, Santa Clara, CA, United States
Abstract
This paper presents a dual architecture for the high-speed realization of basic morphological operations. Since morphological filtering can be described as a combination of erosion and dilation, two basic building blocks are required for the realization of any morphological filter. Architectures for the two basic units, namely the erosion unit and the dilation unit, are proposed and studied in terms of cycle time, hardware complexity, and cost. These basic units are similar in structure to the systolic array architecture used in the implementation of linear digital filters. Correspondingly, the proposed units are highly modular and are suitable for efficient VLSI implementation. These basic units allow the processing of either binary or gray-scale images. They are particularly suitable for applications in robotics, where speed, size and cost are of critical importance.
© (1990) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Alexander C. P. Loui, Anastasios N. Venetsanopoulos, and K. C. Smith "High-speed architectures for morphological image processing", Proc. SPIE 1247, Nonlinear Image Processing, (1 July 1990); https://doi.org/10.1117/12.19605
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CITATIONS
Cited by 9 scholarly publications and 2 patents.
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KEYWORDS
Binary data

Image processing

Image filtering

Nonlinear image processing

Mathematical morphology

Very large scale integration

Digital filtering

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