Computational evaluation of critical logical metal layers of pitch 20-24nm and the aberration sensitivity in high NA EUV single patterning

Weimin Gao; Chun-Kuang Chen; Joerg Zimmermann

doi:10.1117/12.2658871

28 April 2023 Computational evaluation of critical logical metal layers of pitch 20-24nm and the aberration sensitivity in high NA EUV single patterning

Weimin Gao, Chun-Kuang Chen, Joerg Zimmermann

Author Affiliations +

Proceedings Volume 12495, DTCO and Computational Patterning II; 1249509 (2023) https://doi.org/10.1117/12.2658871
Event: SPIE Advanced Lithography + Patterning, 2023, San Jose, California, United States

Abstract

As chip manufacturers seek to reduce the pitch of metal layers, there is growing interest in replacing the multiple patterning process of 0.33NA EUV with a single patterning of high NA (0.55NA) EUV. However, to resolve a logic metal layout with a minimum pitch of 20-24nm, careful use of resolution enhancement techniques (RETs) and SMO (source mask optimization) is required in high NA EUV. Logic metal patterns are complex and have various feature designs, making it essential to ensure sufficient patterning performance across all pitches and for variations of tip-to-tip (T2T) structures with a tight size. In this study, we simulated and evaluated patterning on a typical logic metal layout representing 1.4nm to 1nm technology nodes. Our study demonstrates that compromised criteria are necessary to ensure the NILS (normalized image log-slope) level of the minimum pitch and the overlap critical dimension (CD) process window (PW). In optical proximity correction (OPC), sub-resolution assistant features (SRAF) help to improve the process window of isolated and semi-iso line-and-space (L/S) patterns. However, we found that the limiting patterns are the tight T2T structures. Aberration sensitivity showed a linear response that is more pronounced to pattern placement errors (PPE) than to CDs. The coma series aberration showed the highest sensitivity to PPE and CD. Overall, our study demonstrates that RETs, rigorous SMO solutions, and a minimum T2T size are required to achieve the replacement of 0.33NA EUV multi-patterning with a 0.55NA EUV single patterning (SP) for logic metal layers with minimum pitches of 20-24nm.

Conference Presentation

Citation Download Citation

Weimin Gao, Chun-Kuang Chen, and Joerg Zimmermann "Computational evaluation of critical logical metal layers of pitch 20-24nm and the aberration sensitivity in high NA EUV single patterning", Proc. SPIE 12495, DTCO and Computational Patterning II, 1249509 (28 April 2023); https://doi.org/10.1117/12.2658871

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