Poster + Paper
27 April 2023 A study of 3nm CFET middle-of-the-line contact layer OCD measurement sensitivity
Author Affiliations +
Conference Poster
Abstract
In advanced integrated circuit manufacturing technology, the introduction of nanosheet, forksheet, and Complementary Field Effect Transistor (CFET) architectures has created very complicated and dense vertical structures with dimensions as small as several nanometers and with many metallic layers which are not transparent to most optical wavelengths, posing a serious challenge to the metrology. We have provided a scatterometry study on a test pattern design based on the 3 nm logic design rules. Through a simulation study on typical dimensions, we have investigated various linewidths and contact depth with an algorithm based on the Rigorous Coupled Wave Analysis (RCWA).
© (2023) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Xianhe Liu, Qiang Wu, Qi Wang, and Yanli Li "A study of 3nm CFET middle-of-the-line contact layer OCD measurement sensitivity", Proc. SPIE 12496, Metrology, Inspection, and Process Control XXXVII, 124962Z (27 April 2023); https://doi.org/10.1117/12.2658174
Advertisement
Advertisement
RIGHTS & PERMISSIONS
Get copyright permission  Get copyright permission on Copyright Marketplace
KEYWORDS
Critical dimension metrology

Scatterometry

Scattering

Metrology

3D modeling

Design rules

Light sources and illumination

Back to Top