Paper
8 August 1993 Process-induced wafer distortion: its measurement and effects on overlay in stepper-based advanced lithography
Giovanni Rivera, Paolo Canestrari
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Abstract
The distortion introduced by some manufacturing steps on wafers can sometimes have a strong effect on overlay results. Thermal processes, for example, can introduce wafer distortions that cannot be completely compensated by the stepper alignment system with a consequent degradation in overlay. A new methodology which can measure the process induced distortion on wafers (exposed with a stepper system) at different steps in a standard process flow has been developed and is described in this paper. This method does not require any external metrology instruments apart from a standard precision stepper and the method is compatible with all process layers. Experimental results of application of the method on manufacturing process are presented.
© (1993) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Giovanni Rivera and Paolo Canestrari "Process-induced wafer distortion: its measurement and effects on overlay in stepper-based advanced lithography", Proc. SPIE 1927, Optical/Laser Microlithography, (8 August 1993); https://doi.org/10.1117/12.150477
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KEYWORDS
Semiconducting wafers

Distortion

Overlay metrology

Optical alignment

Manufacturing

Silicon

Lithography

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