Nonlinear dynamics in a neural network (parallel) processor

A. G. Unil Perera; S. G. Matsik; S. R. Betarbet

doi:10.1117/12.211986

16 June 1995 Nonlinear dynamics in a neural network (parallel) processor

A. G. Unil Perera, S. G. Matsik, S. R. Betarbet

Proceedings Volume 2488, Visual Information Processing IV; (1995) https://doi.org/10.1117/12.211986
Event: SPIE's 1995 Symposium on OE/Aerospace Sensing and Dual Use Photonics, 1995, Orlando, FL, United States

Abstract

We consider an iterative map derived from the device equations for a silicon p⁺-n-n⁺ diode, which simulates a biological neuron. This map has been extended to a coupled neuron circuit consisting of two of these artificial neurons connected by a filter circuit, which could be used as a single channel of a parallel asynchronous processor. The extended map output is studied under different conditions to determine the effect of various parameters on the pulsing pattern. As the control parameter is increased, fixed points (both stable and unstable) as well as a limit cycle appear. On further increase, a Hopf bifurcation is seen causing the disappearance of the limit cycle. The increasing control parameter, which is related to a decrease in the bias applied to the circuit, also causes variation in the location of the fixed points. This variation could be important in applications to neural networks. The control parameter value at which the fixed point appear and the bifurcation occurs can be varied by changing the weightage of the filter circuit. The modeling outputs, are compared with the experimental outputs.

Citation Download Citation

A. G. Unil Perera, S. G. Matsik, and S. R. Betarbet "Nonlinear dynamics in a neural network (parallel) processor", Proc. SPIE 2488, Visual Information Processing IV, (16 June 1995); https://doi.org/10.1117/12.211986

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KEYWORDS

Diodes

Neurons

Parallel computing

Interfaces

Neural networks

Capacitance

Linear filtering

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