Compact VLSI neural computer integrated with active pixel sensor for real-time ATR applications

Wai-Chi Fang; Gabriel Udomkesmalee; Leon Alkalai

doi:10.1117/12.271487

4 April 1997 Compact VLSI neural computer integrated with active pixel sensor for real-time ATR applications

Wai-Chi Fang, Gabriel Udomkesmalee, Leon Alkalai

Proceedings Volume 3077, Applications and Science of Artificial Neural Networks III; (1997) https://doi.org/10.1117/12.271487
Event: AeroSense '97, 1997, Orlando, FL, United States

Abstract

A compact VLSI neural computer integrated with an active pixel sensor has been under development to mimic what is inherent in biological vision systems. This electronic eye- brain computer is targeted for real-time machine vision applications which require both high-bandwidth communication and high-performance computing for data sensing, synergy of multiple types of sensory information, feature extraction, target detection, target recognition, and control functions. The neural computer is based on a composite structure which combines Annealing Cellular Neural Network (ACNN) and Hierarchical Self-Organization Neural Network (HSONN). The ACNN architecture is a programmable and scalable multi- dimensional array of annealing neurons which are locally connected with their local neurons. Meanwhile, the HSONN adopts a hierarchical structure with nonlinear basis functions. The ACNN+HSONN neural computer is effectively designed to perform programmable functions for machine vision processing in all levels with its embedded host processor. It provides a two order-of-magnitude increase in computation power over the state-of-the-art microcomputer and DSP microelectronics. A compact current-mode VLSI design feasibility of the ACNN+HSONN neural computer is demonstrated by a 3D 16X8X9-cube neural processor chip design in a 2-micrometers CMOS technology. Integration of this neural computer as one slice of a 4'X4' multichip module into the 3D MCM based avionics architecture for NASA's New Millennium Program is also described.

Citation Download Citation

Wai-Chi Fang, Gabriel Udomkesmalee, and Leon Alkalai "Compact VLSI neural computer integrated with active pixel sensor for real-time ATR applications", Proc. SPIE 3077, Applications and Science of Artificial Neural Networks III, (4 April 1997); https://doi.org/10.1117/12.271487

ACCESS THE FULL ARTICLE

INSTITUTIONAL
Select your institution to access the SPIE Digital Library.

SELECT YOUR INSTITUTION

PERSONAL
Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.

PERSONAL SIGN IN

No SPIE Account? Create one

PURCHASE THIS CONTENT

SUBSCRIBE TO DIGITAL LIBRARY

50 downloads per 1-year subscription

Members: $195

Non-members: $335 ADD TO CART

25 downloads per 1 - year subscription

Members: $145

Non-members: $250 ADD TO CART

PURCHASE SINGLE ARTICLE

Includes PDF, HTML & Video, when available