Optimization of 2D median filtering algorithm for VLIW architecture

Chang Y. Choo; Ming Tang

doi:10.1117/12.375246

29 December 1999 Optimization of 2D median filtering algorithm for VLIW architecture

Chang Y. Choo, Ming Tang

Proceedings Volume 3970, Media Processors 2000; (1999) https://doi.org/10.1117/12.375246
Event: Electronic Imaging, 2000, San Jose, CA, United States

Abstract

Recently, several commercial DSP processors with VLIW (Very Long Instruction Word) architecture were introduced. The VLIW architectures offer high performance over a wide range of multimedia applications that require parallel processing. In this paper, we implement an efficient 2D median filter for VLIW architecture, particularly for Texas Instrument C62x VLIW architecture. Median filter is widely used for filtering the impulse noise while preserving edges in still images and video. The efficient median filtering requires fast sorting. The sorting algorithms were optimized using software pipelining and loop unrolling to maximize the use of the available functional units while meeting the data dependency constraints. The paper describes and lists the optimized source code for the 3 X 3 median filter using an enhanced selection sort algorithm.

Citation Download Citation

Chang Y. Choo and Ming Tang "Optimization of 2D median filtering algorithm for VLIW architecture", Proc. SPIE 3970, Media Processors 2000, (29 December 1999); https://doi.org/10.1117/12.375246

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