Comparison of electrical CD measurements and cross-section lattice-plane counts of submicrometer features replicated in (100) silicon-on-insulator material

Michael W. Cresswell; John E. Bonevich; Thomas J. Headley; Richard A. Allen; Lucille A. Giannuzzi; Sarah C. Everist; Rathindra N. Ghoshtagore; Patrick J. Shea

doi:10.1117/12.386479

2 June 2000 Comparison of electrical CD measurements and cross-section lattice-plane counts of submicrometer features replicated in (100) silicon-on-insulator material

Michael W. Cresswell, John E. Bonevich, Thomas J. Headley, Richard A. Allen, Lucille A. Giannuzzi, Sarah C. Everist, Rathindra N. Ghoshtagore, Patrick J. Shea

Author Affiliations +

Proceedings Volume 3998, Metrology, Inspection, and Process Control for Microlithography XIV; (2000) https://doi.org/10.1117/12.386479
Event: Microlithography 2000, 2000, Santa Clara, CA, United States

Abstract

Electrical test structures of the type known as cross-bridge resistors have been patterned in (100) epitaxial silicon material that was grown on bonded and etched-back silicon-on- insulator (BESOI) substrates. The critical dimensions (CDs) of a selection of their reference segments have been measured electrically and by lattice-plane counting and they have been inspected by scanning-electron microscopy (SEM) cross-section imaging. The lattice-plane counting is performed on phase- contrast images made by high-resolution transmission-electron microscopy (HRTEM). The reference-segment features were aligned with <110> directions in the BESOI surface material. They were defined by a silicon micro-machining process which results in their sidewalls being nearly atomically planar and smooth and inclined at 54.737 degree(s) to the surface (100) plane of the substrate. This (100) implementation may usefully complement the attributes of the previously reported vertical-sidewall implementation for selected reference-material applications. The HRTEM, and electrical CD (ECD) linewidth measurements that are made on BESOI features of various drawn dimensions on the same substrate are being investigated to determine the feasibility of a CD traceability path that combines the low cost, robustness, and repeatability of the ECD technique and the absolute measurement of the HRTEM lattice-plane counting technique. Other novel aspects of the (100) Silicon-On- Insulator (SOI) implementation that are reported here are the ECD test-structure architecture and the making of HRTEM lattice-plane counts from both cross-sectional, as well as top-down, imaging of the reference features. This paper describes the design details and the fabrication of the cross- bridge resistor test structure. The long-term goal is to develop a technique for the determination of the absolute dimensions of the trapezoidal cross sections of the cross- bridge resistors's reference segments, as a prelude to making them available for dimensional reference applications.

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Michael W. Cresswell, John E. Bonevich, Thomas J. Headley, Richard A. Allen, Lucille A. Giannuzzi, Sarah C. Everist, Rathindra N. Ghoshtagore, and Patrick J. Shea "Comparison of electrical CD measurements and cross-section lattice-plane counts of submicrometer features replicated in (100) silicon-on-insulator material", Proc. SPIE 3998, Metrology, Inspection, and Process Control for Microlithography XIV, (2 June 2000); https://doi.org/10.1117/12.386479

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