Metric for process optimization on substrates with transparent stacks in optical lithography

Brian Martin; Graham G. Arthur

doi:10.1117/12.386517

2 June 2000 Metric for process optimization on substrates with transparent stacks in optical lithography

Brian Martin, Graham G. Arthur

Proceedings Volume 3998, Metrology, Inspection, and Process Control for Microlithography XIV; (2000) https://doi.org/10.1117/12.386517
Event: Microlithography 2000, 2000, Santa Clara, CA, United States

Abstract

A new metric for set-up of resist processes on transparent films is described using CMOS active area layer as a test vehicle for lithography simulations. Results show that the metric Es/Ec, where Es is exposure to size and Ec exposure to clear a high resolution feature, is more useful than the conventional ratio Es/Eo and where Eo is exposure to clear an open field area. High values of Es/Ec can protect against resist scumming if film thicknesses are chosen correctly, but if not accounted for at the sub-half-micron scale can be as low as 1.1. Where film thicknesses predict low Es/Ec, the ratio can be increased by use of bottom ARC.

Citation Download Citation

Brian Martin and Graham G. Arthur "Metric for process optimization on substrates with transparent stacks in optical lithography", Proc. SPIE 3998, Metrology, Inspection, and Process Control for Microlithography XIV, (2 June 2000); https://doi.org/10.1117/12.386517

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