Technology of electroplating copper with low-K material a-C:F for 0.15-um damascence interconnection

Jia-Min Shieh; Shich-Chang Suen; Kuen-Chaung Lin; Shih-Chieh Chang; Bau-Tong Dai; Chia-Fu Chen; Ming Shiann Feng

doi:10.1117/12.395747

18 August 2000 Technology of electroplating copper with low-K material a-C:F for 0.15-μm damascence interconnection

Jia-Min Shieh, Shich-Chang Suen, Kuen-Chaung Lin, Shih-Chieh Chang, Bau-Tong Dai, Chia-Fu Chen, Ming Shiann Feng

Proceedings Volume 4181, Challenges in Process Integration and Device Technology; (2000) https://doi.org/10.1117/12.395747
Event: Microelectronic Manufacturing, 2000, Santa Clara, CA, United States

Abstract

In our work, fluorinated amorphous carbon films (a-C:F) was deposited by PECVD. The amorphous carbon films (a-C:F) with low dielectric constant (K-2.3), thermal stability and acceptable adhesion to cap-layer such as SiOF was obtained by optimum of content ration between carbon with fluorine and adding few SiH₄ for improvement of adhesion. The etching profile with high aspect ratio and etching selection ration more than 50 (a- C:F/SiOF) were obtained by etching gas of N₂+O₂. Furthermore, we demonstrated the technology of electroplating copper in trenches or vias as small as 0.15 micrometers , 6:1 AR. The wetting agent system was consisted of mainly two molecular weights polyethylene glycols (PEG). The small molecular weight PEG with better diffusion ability for reducing the surface tension and the larger PEG enhancing grain growth control was proposed for the first time to wet the inner portion of the sub- 150 nm damascene feature. The leveling agent system was mainly heterocyclic compound contained N, S atoms offering sufficient activation over-potential and selective inhibition gradient.

Citation Download Citation

Jia-Min Shieh, Shich-Chang Suen, Kuen-Chaung Lin, Shih-Chieh Chang, Bau-Tong Dai, Chia-Fu Chen, and Ming Shiann Feng "Technology of electroplating copper with low-K material a-C:F for 0.15-μm damascence interconnection", Proc. SPIE 4181, Challenges in Process Integration and Device Technology, (18 August 2000); https://doi.org/10.1117/12.395747

ACCESS THE FULL ARTICLE

INSTITUTIONAL
Select your institution to access the SPIE Digital Library.

SELECT YOUR INSTITUTION

PERSONAL
Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.

PERSONAL SIGN IN

No SPIE Account? Create one

PURCHASE THIS CONTENT

SUBSCRIBE TO DIGITAL LIBRARY

50 downloads per 1-year subscription

Members: $195

Non-members: $335 ADD TO CART

25 downloads per 1 - year subscription

Members: $145

Non-members: $250 ADD TO CART

PURCHASE SINGLE ARTICLE

Includes PDF, HTML & Video, when available