Optimal design method for fast carry-skip adders

Songjun Lee; Earl E. Swartzlander Jr.

doi:10.1117/12.448646

20 November 2001 Optimal design method for fast carry-skip adders

Proceedings Volume 4474, Advanced Signal Processing Algorithms, Architectures, and Implementations XI; (2001) https://doi.org/10.1117/12.448646
Event: International Symposium on Optical Science and Technology, 2001, San Diego, CA, United States

Abstract

A carry-skip adder is faster than a ripple carry adder and it has a simple structure. To maximize the speed it is necessary to optimize the width of the blocks that comprise the carry skip adder. This paper presents a simple algorithm to select the size of each block. Assuming that each logic gate has a unit delay, the algorithm achieves slightly faster designs for 64 and 128 bit adders than previous methods developed by Guyot, et al. and Kantabutra.

Citation Download Citation

Songjun Lee and Earl E. Swartzlander Jr. "Optimal design method for fast carry-skip adders", Proc. SPIE 4474, Advanced Signal Processing Algorithms, Architectures, and Implementations XI, (20 November 2001); https://doi.org/10.1117/12.448646

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