FPGA-based architecture for motion recovering in real-time

Miguel Arias-Estrada; Selene E. Maya-Rueda; Cesar Torres-Huitzil

doi:10.1117/12.458521

27 February 2002 FPGA-based architecture for motion recovering in real-time

Miguel Arias-Estrada, Selene E. Maya-Rueda, Cesar Torres-Huitzil

Proceedings Volume 4666, Real-Time Imaging VI; (2002) https://doi.org/10.1117/12.458521
Event: Electronic Imaging, 2002, San Jose, California, United States

Abstract

A key problem in the computer vision field is the measurement of object motion in a scene. The main goal is to compute an approximation of the 3D motion from the analysis of an image sequence. Once computed, this information can be used as a basis to reach higher level goals in different applications. Motion estimation algorithms pose a significant computational load for the sequential processors limiting its use in practical applications. In this work we propose a hardware architecture for motion estimation in real time based on FPGA technology. The technique used for motion estimation is Optical Flow due to its accuracy, and the density of velocity estimation, however other techniques are being explored. The architecture is composed of parallel modules working in a pipeline scheme to reach high throughput rates near gigaflops. The modules are organized in a regular structure to provide a high degree of flexibility to cover different applications. Some results will be presented and the real-time performance will be discussed and analyzed. The architecture is prototyped in an FPGA board with a Virtex device interfaced to a digital imager.

Citation Download Citation

Miguel Arias-Estrada, Selene E. Maya-Rueda, and Cesar Torres-Huitzil "FPGA-based architecture for motion recovering in real-time", Proc. SPIE 4666, Real-Time Imaging VI, (27 February 2002); https://doi.org/10.1117/12.458521

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