Over the last 5 years, deep dry etching of silicon has developed into a mainstream microsystems process technology. To transition from R&D into production, some of the main issues to address are the CoO (cost of ownership), reliability and reproducibility of capital equipment. Commensurate with this, it is essential to achieve high etch rates with good profile control. MICROSPECT (Microsystems Production Evaluated Cluster Tool), a project within the EC SEA programme, has sought to address these issues. The project has evaluated and significantly enhanced the performance of STS ASE modules for deep dry etching on an ASPECT^HR production cluster platform. The development phase of the project has provided an ideal opportunity for the equipment supplier to test and respond to feedback on the tool and the latest hardware and software developments with multiple end users, including a new high density inductively coupled plasma (ICP) source. This has resulted in higher etch rates for greater throughput and improved profile control across a variety of applications, including silicon-on-insulator (SOI)-based MEMS and microfluidics. During the evaluation phase, the system was operated under close-to-production conditions to establish system reliability and metrics.

Sidewall smoothness is often a critical requirement for many MEMS devices, such as microfludic devices, chemical, biological and optical transducers, while fast silicon etch rate is another. For such applications, the time division multiplex (TDM) etch processes, so-called "Bosch" processes are widely employed. However, in the conventional TDM processes, rough sidewalls result due to scallop formation. To date, the amplitude of the scalloping has been directly linked to the silicon etch rate. At Unaxis USA Inc., we have developed a proprietary fast gas switching technique that is effective for scalloping minimization in deep silicon etching processes. In this technique, process cycle times can be reduced from several seconds to as little as a fraction of second. Scallop amplitudes can be reduced with shorter process cycles. More importantly, as the scallop amplitude is progressively reduced, the silicon etch rate can be maintained relatively constant at high values. An optimized experiment has shown that at etch rate in excess of 7 μm/min, scallops with length of 116 nm and depth of 35 nm were obtained. The fast gas switching approach offers an ideal manufacturing solution for MEMS applications where extremely smooth sidewall and fast etch rate are crucial.

This paper is focused on the development of silicon dioxide dry etching for Microsystems application. New requirements for oxide etching have been identified; keys issues are the higher oxide thickness (several microns) and the different design rules (large open areas, isolated patterns). To achieve these requirements, advanced oxide etching processes have been developed in conventional reactor using either photoresist or hard mask. The effects of several process parameters on etch rate, selectivity, oxide pattern profile have been investigated. When using a photoresist mask, the major process limitation is caused by the oxide to photoresist selectivity. Straight profiles may only be obtained if the polymerisation on the side-walls is well-controlled. So, a compromise has to be made between etch rate, oxide to mask selectivity and pattern profiles. The use of hard mask leads to achieve excellent profile control with very high aspect ratio. But, gas chemistry and process parameters such as pressure, total gas flow and chemistry have to be precisely adjusted in order to avoid the aspect ratio dependant etching in narrow patterns. Vertical profiles in high aspect ratio features can be achieved but lateral oxide erosion have to be drastically controlled.

Low etching pressure and addition of buffer gas successfully decrease the etched surface roughness and the aperture effect which represent challenges toward the application of silicon etching with XeF₂ to MEMS fabrication. Etched roughness and aperture effect are extremely high and limit factors for the design rules of MEMS. By lowering the charge pressure of XeF₂ from 390 to 65 Pa, the etched roughness decreased from 870.8 and 174.4 Å and the uniformity ((depth for 25 μm mask aperture)(depth for 175 μm mask aperture)× 100 %) improved from 71.3 to 88.7%. By adding N₂ or reaction products including Xe and SiF₄ as buffer gas, surface roughness was reduced and the surface morphology changed.

The etching of single crystal silicon in ethylenediamine-pyrocatechol-water solutions (EDP) has been studied as a function of the composition of the etching solution. The solution with a constant composition of 7.5ml of ethylenediamine (with 6g of pyrazine per liter) and 1.2g of pyrocatechol is used, and the water content is varied from 0ml to 4ml. Etch rate dependence on the active etching area is examined using three mask patterns having significantly different areas. It has been observed that etch rate depends significantly on the feature size in the solutions with higher water concentration and is almost independent of the area when the water content is 1ml and below. Surface morphology was the other important criteria considered while optimizing the solution. It is found that the hillocks formation on surface is dependent on the etchant composition. Hillock density has been measured by etching the samples in different compositions to a constant depth of 45μm. It is found to be high when the water content is above 2ml and also when the amount of water is reduced below 0.5ml. Minimal Hillock density is obtained when the water content is 0.5ml. The optimized EDP solution containing 0.5ml of water results in an etch rate of 44μm/hr, independent of feature size and also good surface finish with hillock density less than ~10³/cm².

A need exists for spin-applied polymeric coatings to protect electronic circuitry and other sensitive structures on MEMS devices during deep silicon wet etching processes involving corrosive mixtures of aqueous acids and bases. The challenge exists in developing protective coatings that do not decompose or dissolve in the harsh etchants and, more importantly, that maintain good adhesion to the substrate during the sometimes long etching processes. We have developed a multilayer coating system that is stable and adheres well to silicon nitride and other semiconductor materials and affords chemical protection for at least eight hours in hot potassium hydroxide etchant. The same coating system is also compatible with concentrated hydrofluoric acid etchants, which can diffuse rapidly through many polymeric materials to attack the device substrate.

A new resist for alkaline-based silicon anisotropic etching process has been developed. Bismuth over Indium films, 30 nm to 90 nm thick for each layer, were DC-sputtered on silicon substrates, and were used as a thermally activated photoresist on which patterns were generated using focused Argon laser beam. Both physical and chemical properties of the bimetallic film changed after the laser exposure. Unlike normal organic photoresist, Bi/In is laser wavelength invariant as it is a thermal processes. The laser exposed patterns were developed in diluted RCA2 solution that selectively removed the unexposed area and retained the exposed. The developed Bi/In patterns acted as an etching mask for the subsequent alkaline-based silicon anisotropic etch at 85°C. It was found that the developed Bi/In has a lower etch rate than that of SiO₂ in the etching solutions, making it a potential masking material for silicon bulk micromachining process. Solar cells with V-groove surface textures were manufactured to show the compatibility of Bi/In with conventional processes.

Microstructures on glass surfaces achieved an increasing relevance in industry and research during the last years. They are used to add various optical and/or mechanical functionalities to surfaces of glass components. Important mechanical functionalities are e.g. the anti-sticking behaviour of nanostructures or the generation of micro cavities. Reduced reflectivity and the addition of diffractive optical power with negative dispersion are examples of relevant optical functionalities which can be supplemented. The authors evaluated theoretically and experimentally different promising technologies for generating such structures. Especially there was tested the compression moulding replication process, the deep drawing of glass, etching and sandblasting. All these methods are able to generate microstructures and show characteristic advantages and disadvantages. Ion beam etching allows the smallest structures but is relatively expensive. Furthermore, the ion beam etching can be used for a large variety of materials. Sandblasting is a very effective way of generating deep structures, but is limited in feature size. Wet chemical etching is suitable for small structures but not able to achieve high aspect ratios in glass. The deep drawing of glass presents a very cost efficient way for generating microstructures in volume production. Here the disadvantage is the limited feature size and aspect ratio that can be generated. Utilizing its different advantages, applications are developed by the authors for all three technologies. These are applications to be used in sensors, displays and in the semiconductor industry.

A high quality UV-lithographic process for making high aspect ratio micro reciprocating engine parts on ultra-thick SU-8 photoresist CO₂ is described. The research work is part of an on-going microengine research project at the University of Birmingham. The project aims to develop a compact power plant for driving MEMS devices and replacing batteries. The novelty of engine design is that the engine is constructed in two layers only, and all parts are designed to suit the 2D microfabrication feature. Due to the strict requirements on the perpendicular geometry of the engine parts, the microfabrication research work has been concentrated in conducting a high quality UV-lithographic process on ultra-thick SU-8 for producing microengine parts. Based on the study of the optical property of ultra-thick SU-8 layer, optimized prebake time has been selected to obtain the minimum UV absorption by SU-8. The optimization principle has proved effective by a series of experiments of UV-lithography on different prebake times, and high aspect ratio structure (about 10) engine parts have been produced in 1000 μm ultra-thick SU-8 layers using the standard UV-lithography equipment. The sidewall angles are controlled between 85~90 degrees, which is a much better improvement than those reported so far.

This paper presents a micro reactor, which consists of a permeable membrane fabricated by silicon micro machining technology. The fabrication process is a combination of anisotropic silicon etching (wet etching and dry etching) and porous silicon technology. To avoid a reaction chamber with a high dead volume, we have realised a permeable membrane in conjunction with porous silicon to achieve a high surface to volume ratio, impregnated with palladium or platinum. For the activation of the heterogeneous reaction on the surface of the catalytic material a heating element around the permeable membrane, which is thermally decoupled with a porous silicon well of the surrounding bulk material is realised. The gas flows through the membrane and reacts during the passing time. The reaction time for gases depends on the membrane thickness and the active surface of the porous silicon. The application is the integration into a gas analysing system combined with a gas sensor array, a gas chromatographic system, microvalves, and calibration units mounted all on a pneumatic motherboard.

MEMS and other emerging applications such as planar photonic devices, display devices and advanced chip and wafer level packaging, require superior planarity of thin films in order to enable greater functionality. The only process technology shown to consistently deliver both global and local planarity is Chemical Mechanical Planarization (CMP). CMP was initially developed to meet the increasingly stringent planarity requirements of the integrated circuit (IC) industry and has since become the standard planarization process within the semiconductor industry. However, emerging applications share film characteristics that present planarization challenges quite different from the traditional IC applications, including: 1) much larger step heights and wider feature sizes, 2) thicker films, 3) multiple materials present within the same layer, and 4) large discrepancies in pattern densities and feature sizes. Due to these challenges, standard CMP process steps, alone, may not deliver the desired planarity. In this paper, other techniques in combination with standard CMP will be investigated as a means to meet stringent planarity requirements of MOEMS. These techniques include: (a) optimizing CMP slurry formulation for both material removal rate and material selectivity, (b) integrating various technologies such as additional etch steps, protective masks and lift-off processes to deliver a surface that is more complementary to CMP, and (c) developing a two-step CMP process with a bulk removal step followed by a soft landing step. A working example will also be presented to demonstrate the feasibility of the proposed methodology.

Chemical mechanical planarization (CMP) is an integral process in the semiconductor industry that enables the fabrication of advanced integrated circuit (IC) components. It is the method of choice for obtaining both local and global planarization of IC thin films, including metals, such as copper, aluminum and tungsten, and dielectrics such as silicon dioxide. An emerging area for application of CMP is in Micro-Electro-Mechanical Systems (MEMS). Fabricated from a variety of materials, including polymers, metals and ceramics, MEMS devices present new opportunities and new challenges for CMP. This paper describes the planarization and fabrication requirements of MEMS CMP, from both a materials and a processing perspective, with a comparison to IC CMP. Examples using popular MEMS fabrication materials, such as standard and photosensitive polyimides, alumina and copper, will demonstrate the efffectiveness of CMP for microfabrication and micromachining applications. Additional results will illustrate the use of CMP as a means to selectively and controllably effect a high degree of planarization efficiency on a variety of microelectronics substrates. Finally, the role of CMP in meeting future MEMS/MOEMS-related applications will be addressed.

This paper describes a planarization procedure to achieve a flat CMOS die surface for the integration of a MEMS metal mirror array. The CMOS die for our device is 4 mm × 4 mm and comes from a commercial foundry. The initial surface topography has 0.9 μm bumps from the aluminum interconnect patterns that are used for addressing the individual micro mirror array elements. To overcome the tendency for tilt error in the planarization of the small CMOS die, our approach is to sputter a thick layer of silicon nitride (2.2 μm) at low temperature and to surround the CMOS die with dummy pieces to define the polishing plane. The dummy pieces are first lapped down to the height of the CMOS die, and then all pieces are polished. This process reduces the 0.9 μm height of the bumps to less than 25 nm.

A new MEMS process module, called Mod MEMS, has been developed to monolithically integrate thick (5-10um), multilayer polysilicon MEMS structures with sub-micron CMOS. This process is particularly useful for advanced inertial MEMS products such as automotive airbag accelerometers where reduced cost and increased functionality is required, or low cost, high performance gyroscopes where thick polysilicon (>6um) and CMOS integration is required to increase poly mass and stiffness, and reduce electrical parasitics in order to optimize angular rate sensing. In this paper we will describe the new modular process flow, development of the critical unit process steps, integration of the module with a foundry sub-micron CMOS process, and provide test data on several inertial designs fabricated with this process.

Hard Disk Drives (HDD) are the most widely used data-storage medium. The Track Per Inch (TPI) limit is related to mechanical resonances of the positioning arm and to low frequency bearing effect. A secondary actuator must be able to position precisely with higher bandwidth the Read/Write (RW) head with respect to the magnetic track with any interference with the magnetic data recorded on the disk. MEMS technology allows the fabrication of such electrostatic microactuator for the secondary stage in the HDD. The paper presents the basics requirements for the secondary actuator for the HDD as well as the process developed to fulfill those. Accurate calculation and FEM simulation are required to lead to high performance and robust design. After the built a deep experimental analysis is ducted to confirm and refine design parameters.

A processing scheme for fabricating Pb(Zr_xTi_1-x)O₃ thin film actuated silicon cantilevers using silicon-on-insulator wafers is described. Such piezoelectrically actuated cantilevers are being investigated for RF microswitches. The microswitch design specification requires the Pb(Zr_xTi_1-x)O₃ thin film to be at least 1μm thick to achieve the adequate deflection at an operating voltage of 10V. A two-stage dry-wet etching process was developed to reliably pattern the 1μm Pb(Zr_xTi_1-x)O₃ film. To release the Pb(Zr_xTi_1-x)O₃ cantilevers on silicon-on-insulator wafers it is necessary to perform deep silicon etching from both sides of the wafer. The Pb(Zr_xTi_1-x)O₃ thin film was prepared by sol-gel method. The piezoelectric coefficient d₃₁ was calculated as 14pC/N.

SOI wafers are finding increasing applications in MEMS devices. The device Si, buried oxide, and handle Si layers provide mechanical and structural properties to create more complex 3D free standing structures. This paper presents the fabrication process of double-sided mirror by using surface and bulk micromachining of SOI wafers. Silicon nitride thin firms are deposited on device layer of SOI to provide torsion bar material of the mirror. Device layer provides single crystal Si mechanical reinforcement to counteract the stress associated with silicon nitride. The underlying buried oxide acts as an etch-stop layer during DRIE of the Si handle layer and sacrificial layer for releasing the torsion bars. The dimensions of the mirror are 250um by 500um suspended by two torsion bars that are 350um by 6um by 0.4um.

A new generation of products has been developed at research institutes needing a combination of thin film metal processing and surface micromachining. Especially RF MEMS switches and related products are now entering the market. These products are not only complex in architecture, they also feature relative thick metal layers. The thicknesses of the metal layers give rise to problems in the field of step coverage, dimension control and limited resistance to etching agents. Reliability and yield in production is therefore a major concern. To make robust, compact and reliable structures, combinations of electroplating and Chemical Mechanical Polishing are used. The combinations are not only new in this area; they are rather different from the standards in the semiconductor industry, where the technology was developed. The process modules are used in RF MEMS to create the thick signal lines, as well as the delicate switch and varactor structures. The basic processes, tried and tested in the production of magnetic heads, had to be modified to meet the special demands of RF MEMS. Also new processes had to be introduced to create free hanging membranes. Due to the fragility of the structures, a special technology is being developed in the backend processing: wafer scale packaging. This article gives an overview of the processes, the challenges met and the results of the work on RF MEMS at the OnStream MST foundry.

This paper presents the fabrication of a planar photonic crystal (p²c) made of a square array of dielectric rods embedded in air, operating in the infrared spectrum. A quartz substrate is employed instead of the commonly used silicon or column III-V substrate. Our square structure has a normalized cylinder radius-to-pitch ratio of r/a = 0.248 and dielectric material contrast ε_r of 4.5. We choose a Z-cut synthetic quartz for its cut (geometry), and etching properties. Then a particular Z-axis etching process is employed in order to ensure the sharp-edged verticality of the rods and fast etching speed. We also present the computer simulations that allowed the establishment of the photonic band gaps (PBG) of our photonic crystal, as well as the actual measurements. An experimental measurement have been carried out and compared with different simulations. It was found that experimental results are in good agreement with different simulation results. Finally, a frequency selective device for optical communication based on the introduction of impurity sites in the photonic crystal is presented. With our proposed structure Optical System on a Chip (OsoC) with micro-cavity based active devices such as lasers, diodes, modulators, couplers, frequency selective emitters, add-drop filters, detectors, mux/demuxes and polarizers connected by passive waveguide links can be realized.

So far, the history of silicon gratings has more than 20 years and the development of fabrication methods and applications have improved a lot. Microfabrication process to made silicon gratings can be divided into bulk silicon and surface silicon technology. All these technologies are compatible with the process of MEMS, and this made it possible to fabricate micro spectrometers. We present the fabrication process of a grating by using (111) silicon wafer. The silicon gratings were manufactured using silicon micromachining techniques, as ultraviolet lithography and anisotropic wet etching, achieving good uniformity surface and grating facets of excellent optical quality. Some testing results on the silicon grating are presented.

This paper presents a compliant-MEMS technology based silicon-polymer hybrid actuator and its applications to tunable optical filters for DWDM Optical Performance Monitoring (OPM), tunable external cavity lasers, Optical Spectrum Analyzers (OSA) and Infra Red (IR) chemical detectors. The C-MEMS technology provides wider tuning range, tailored spring force and low manufacturing cost. The advantages of C-MEMS technology rely on selecting optimum materials for the functioning components. The Fabry-Perot filter, TFM-2000 achieves performance of 2000 plus finesse over 40 nm tuning range with 1.5 dB insertion loss, which is better than any single pass tunable filter on the market. Fabrication processes are discussed.

We are examining surface characteristics of ultraviolet pulsed-laser micromachined structures in polymide as a function of the incident laser energy and the distance between subsequent laser spots in order to prepare surfaces for laser direct-write deposition of metals. Variations in the spot-to-spot translation distance provide an alternative means of average depth and roughness control when compared to fluence changes and focal distance variations. We find that the average depth is proportional to the inverse of the translation distance, while the root mean square surface roughness reaches a minimum when the translation distance is approximately equal to the full width half maximum of a single ablation mark on the surface. Conductive silver metal lines are deposited on the surface machined features demonstrating the ability to produce conductors with good adhesion over stepped structures on polyimide.

Advanced microsystems for optoelectronic and biomedical applications incorporate a variety of non-metallic materials such as glass, silicon, sapphire and polymers. Examples include switches and multiplexers for fiber-optical data transmission in telecommunications, and innovative implantable microsystems currently being developed to monitor, stimulate and deliver drugs. Laser micromachining has proven to be an effective tool to address specific manufacturing challenges for these devices. Investigations have been conducted on laser ablation for precise localized material removal, laser cutting, and drilling; and application data for a range of relevant materials already exists. In contrast, applications of laser joining are currently limited to microwelding and soldering of metals. The assembly of SMD’s and the sealing of pacemakers are typical examples. This paper will describe the latest achievements in laser microjoining of dissimilar materials. The focus will be on glass, metal and polymer that have been joined using CO₂, Nd:YAG and diode lasers. Results in joining similar and dissimilar materials in different joint configurations will be presented, as well as requirements for sample preparation and fixturing. The potential for applications in the optoelectronic and biomedical sector will be demonstrated.

Planar gratings have wide applications and, till date, many methods for the fabrication of gratings have been reported. Ultrashort pulse laser has been used for the machining of gratings primarily due to its ability of direct ablation and its capability to fabricate sub-wavelength structures. In this paper, we present a novel direct ablation technique for the fabrication of planar gratings by interfering ultrashort pulses in a novel optical configuration. This technique not only simplifies the optical setup, but also immunizes the system to extraneous and inherent vibrations, thus enabling planar gratings of good edge acuity. In addition, this technique ensures that gratings are formed only on the focal point. The grating line width can also be adjusted without much change to the optical configuration. With this technique, we have successfully fabricated planar grating of different line-widths on a silicon substrate. Effect of pulse number, and the laser threshold on the grating quality has been qualitatively studied using SEM analysis. This method offers a novel technique for the fabrication of surface relief profile on the metal surface by direct ablation. The optical setup is immune to vibration, at the same time cost effective and fast. Gratings have wide applications and this fabrication technique can be realized commercially.

In the present paper, the authors report their research on fabricating the three-dimensional microstructures on polymers by using the technology of excimer laser direct etching. A kind of mask structure called adhering mask, which can be used to fulfill the direct etching of polymers by a simpler optical system, is introduced. In addition, its fabrication process and optical system of the direct etching are also given in this paper. Finally the three-dimensional microstructures we fabricate by the technology are shown.

In this paper a design concept for tong grippers for micro-parts is presented which allows the quick development of adapted grippers for automated micro-assembly processes. This concept is demonstrated by several gripper prototypes. They consist of a flexure hinge structure made of metal which acts as guiding device for the gripping jaws and as the gripping jaws themselves. This structure ensures a very precise movement of the jaws since stick slip effects in the guiding device are avoided. The actuation is done by force generating actuators like moving coil, magnetic or pneumatic piston actuators. The use of a frictionless elastic guiding device in addition to mostly frictionless actuators guarantees a high precision of the jaw movement as well as a very precisely adjustable gripping force. The concept covers the design of the flexure hinge structure, the design of the actuators and the coupling of actuator and flexure hinge structure. Using this design concept several grippers have been realized and tested in experimental evaluations where they proved their reliability and the fulfillment of the given specifications thus verifying the correctness of the design concept.

Novel through-die front-to-back connections for MEMS applications are described. Large diameter (~100 μm diameter) front-to-back through-die connections have been studied previously for MEMS applications. Multi-level through-die hole structures are proposed here to overcome problems of large diameter through-die holes (lesser front-side active area) and facilitate new applications. Two-level versions of such through-die holes comprise of a small front-side hole (<1 μm diameter) and a large back-side hole (~100 μm diameter), or vice versa. Alternatively, multiple small holes from one side can connect to a large hole from the other side. Multiple concentric holes from one surface can be fabricated with appropriate spacer technology. Two-level through-die structures in silicon have been designed, fabrication processes developed, and the resulting structures characterized. New CMP based patterning techniques have been developed for sidewall films on through-die wafers. Two-level through-die holes have been fabricated with 100 μm diameter hole in the back and 5 to 30 μm diameter holes in the front-side with a pitch from 300 μm to 1000 μm. Through-die hole sidewall conductive coatings have been accomplished with CVD Tungsten and in-situ doped LPCVD Polysilicon. Two-level through-die holes have many potential applications, including low impedance ground connections, on-die power/ground distribution, on-die Faraday shielding, on-chip CMOS and MEMS integration, 3D MEMS devices, micro-fluidics, and 3D integration.

For several kinds of MEMS (gyrometers, accelerometers, RF MEMS, bolometers, vacuum allows a significant improvement of performances. Leti has developed a high performance sensor operating at a pressure lower than 10^-3 mbar. In a first phase, a ceramic vacuum packaging has been developed: the device is encapsulated in a cavity containing a getter. However, this technique increases considerably the fabrication costs, because it is made at the chip level. For that reason, Leti has also developed wafer-level vacuum packaging process. The process to manufacture encapsulated devices is presented in this paper. The vacuum function is obtained thanks to an additional wafer (glass or silicon wafer), which supports getters. This wafer is bonded by an hermetic bonding. Characterisation of different kinds of bonding, in term of hermeticity, is presented. First chips manufactured with this process have been tested. The vacuum level in the cavities has been measured, and was lower than 10^-3 mbar. Moreover, vacuum evolution during 6 months does not show pressure increase. This process can be easily adapted to several MEMS applications. With these experiments, Leti has so proved the possibility of manufacturing low cost vacuum packaged MEMS.

Considerable time for alignment is typically spent in the assembly of fiber optic components and subsystems. Presented here is a process that allows for pick-and-place assembly and automated alignment of these components. Fibers that are normally pre-attached to collimating or coupling lenses are left free in this process. The fiber position can then be re-located at the point of optimum performance by actively monitoring system performance. The fiber alignment can compensate for misalignment of the primary assembly components. Once the optimum fiber position is achieved the fiber is fused to the collimating or coupling lens element to provide the best mechanical and thermal stability of the finished assembly.

Electronic packaging and chip-to-module connections have evolved to meet the needs of electronic systems. The rate of change of the technology will accelerate as the package disappears and optical interconnects come into play. Compliant wafer-scale packaging is an approach which can be used to provide acceptable electrical and mechanical functions for future electronic packaging. In this work, buried air-cavities using sacrificial polymers are used to provide compressible input/output leads.

A new module packaging method is proposed for electronic systems comprising a motherboard and integrated circuit (IC) chips. Pitches of 10 microns for conductive traces, and 100 microns for bonding pads are achievable. The enabling technology is glass panel manufacture, using equipment and techniques similar to those employed for fabricating liquid crystal display (LCD) panels. Flexible circuits are produced on a glass carrier using a release layer, and the carrier is removed after most of the processing is complete. IC chips are stud bumped and flip chip bonded to wells filled with solder, provided on the flexible circuit. The fabrication density achievable with wafer level packaging (WLP) using silicon wafers is substantially more than is needed for module packaging, as described herein. It is possible to provide WLP performance on glass at a much lower cost. The conductor features on glass are fine enough for the most demanding packaging and assembly techniques. The lowered cost of glass applies to the interconnection circuit plus assembly, test and rework. A test method called Tester-On-Board (TOB) is proposed, employing special-purpose test chips that are directly mounted in the system and mimic the capabilities of external testers. Methods for hermetic sealing, electromagnetic screening, and high-density off-board connections are also proposed.

Bis-ortho-Diynyl Arene (BODA) monomers polymerize to network polynapthalene by the thermally-driven Bergman cyclization and subsequent radical polymerization via oligomeric intermediates that can be melt or solution processed. Further heating of the network to 1000 °C affords a high-yield glassy carbon structure that retains the approximate size and dimensions of the polymer precursor. The higher carbon-yield for BODA networks (75- 80 % by mass) is significantly greater than that of traditional phenol-formaldehyde resins and other carbon precursor polymers leading to its greater dimensional stability. Phenyl terminated BODA derived polymers were fabricated using microprocessing such as the micromolding in capillaries (MIMIC) technique, direct microtransfer molding, and molding in quartz capillary tubes. Nano-scale fabrication using closed packed silica spheres as templates was demonstrated with an hydroxy-terminated monomer which exhibits greatly enhanced compatibility for silica surfaces. After pyrolysis to glassy carbon, the silica is chemically etched leaving an inverse carbon opal photonic crystal which is electrically conductive. The wavelength of light diffracted is a function of the average refractive index of the carbon/ filler composite, which can be modified for use as sensitive detector elements.

Microfabrication techniques such as bulk micromachining and surface micromachining currently employed to conceive MEMS are largely derived from the standard IC and microelectronics technology. Even though many MEMS devices with integrated electronics have been achieved by using the traditional micromachining techniques, some limitations have nevertheless to be underlined: 1) these techniques are very expensive and need specific installations as well as a cleanroom environment, 2) the materials that can be used up to now are restricted to silicon and metals, 3) the manufacture of 3D parts having curved surfaces or an important number of layers is not possible. Moreover, for some biological applications, the materials used for sensors must be compatible with human body and the actuators need to have high strain and displacement which the current silicon based MEMS do not provide. It is thus natural for the researchers to look for alternative methods such as Microstereolithography (MSL) to make 3D sensors and actuators using polymeric based materials. For MSL techniques to be successful as their silicon counterparts, one has to come up with multifunctional polymers with electrical properties comparable to silicon. These multifunctional polymers should not only have a high sensing capability but also a high strain and actuation performance. A novel UV-curable polymer uniformly bonded with functionalized nanotubes was synthesized via a modified three-step in-situ polymerization. Purified multi-walled nanotubes, gained from the microwave chemical vapor deposition method, were functionalized by oxidation. The UV curable polymer was prepared from toluene diisocyanate (TDI), functionalized nanotubes, and 2 hydroxyethyl methacrylate (HEMA). The chemical bonds between NCO groups of TDI and OH, COOH groups of functionalized nanotubes help for conceiving polymeric based MEMS devices. A cost effective fabrication techniques was presented using Micro Stereo Lithography and an example of a micropump was also described. The wireless concept of the device has many applications including implanted medical delivery systems, chemical and biological instruments, fluid delivery in engines, pump coolants and refrigerants for local cooling of electronic components.

According to the latest release of the NEXUS market study, the market for MEMS or Microsystems Technology (MST) is predicted to grow to $68B by the year 2005, with systems containing these components generating even higher revenues and growth. The latest advances in MST/MEMS technology have enabled the design of a new generation of microsystems that are smaller, cheaper, more reliable, and consume less power. These integrated systems bring together numerous analog/mixed signal microelectronics blocks and MEMS functions on a single chip or on two or more chips assembled within an integrated package. In spite of all these advances in technology and manufacturing, a system manufacturer either faces a substantial up-front R&D investment to create his own infrastructure and expertise, or he can use design and foundry services to get the initial product into the marketplace fast and with an affordable investment. Once he has a viable product, he can still think about his own manufacturing efforts and investments to obtain an optimized high volume manufacturing for the specific product. One of the barriers to successful exploitation of MEMS/MST technology has been the lack of access to industrial foundries capable of producing certified microsystems devices in commercial quantities, including packaging and test. This paper discusses Multi-project wafer (MPW) runs, requirements for foundries and gives some examples of foundry business models. Furthermore, this paper will give an overview on MST/MEMS services that are available in Europe, including pure commercial activities, European project activities (e.g. Europractice), and some academic services.

Gray scale lithography is becoming a popular technique for producing three-dimensional structures needed in fabricating photonics and MEMS devices. The structures are printed using a variable transmission mask to yield the required continuous tone intensity during image formation. In binary half tone imaging (i.e., BHT), the transmission through the mask is adjusted by varying the open area of sub-patterns. Design rules, fabrication tradeoffs and a layout methodology employing a novel primitive cell to aid in constructing the BHT masks are discussed Simulation is leveraged to tie the BHT design with expected imaging results. The overall process is exercised by fabricating a specific grayscale design for use in a photonic application. The BHT mask approach to gray scale lithography is a viable method to fabricate three-dimensional images offering MEMS and photonics communities a cost effective alternative to gray scale masks which rely on specialty materials and films.

MEMS (Micro Electro Mechanical Systems) technology has expanded widely over the last decade in terms of its use in devices and instrumentation for diverse applications. However, access to versatile foundry services for MEMS fabrication is still limited. At INO, the presence of a multidisciplinary team and a complete tool set allow us to offer unique MEMS foundry-type services. These services include: design, prototyping, fabrication, packaging and testing of various MEMS and MOEMS devices. The design of a device starts with the evaluation of different structures adapted to a given application. Computer simulation tools, like IntelliSuite, ANSYS or custom software are used to evaluate the mechanical, optical, thermal and electromechanical performances. Standard IC manufacturing techniques such as metal, dielectric and semiconductor film deposition and etching as well as photolithographic pattern transfer are available. In addition, some unique techniques such as on-wafer lithography by laser writing, gray-scale mask lithography, thick photoresist lithography, selective electroplating, injection moulding and UV-assisted moulding are available to customers. The hermetic packaging and a novel patented wafer-level micropackaging are also applied. This multifaceted expertise has been utilized to manufacturing of several types of MEMS devices as well as complex instruments including micromirror-type devices, microfilters, IR microbolometric detector arrays, complete cameras and multipurpose sensors.

This paper presents an easy and novel mechanical micro-machining method. Combining the commercial AFM and the high accuracy stage and using a diamond tip as the cutting tool which acts as a single asperity, a mechanical micro-machining system is developed. Some experiments are carried out basing on this system. Influence of the diamond tip’s shape on micro machining is considered. And different machining techniques are compared in this paper. Using this method the intricate patterns (circle, flat, polygon flat and a gear geometry) are successfully fabricated. So the novel approach’s strength are as follows: It can machine several tens of microns micro-parts more easier and cheaper then the conventional technology. And it can image the micro-structure just after it is machined. Generally this technique can be used to machine the mask of other micro-machining process, the mold of micro-parts, or to machine on the micro-part which is fabricated by other ways.

Polymers with high viscosity, like SU8 and BCB, play a dominant role in MEMS application. Their behavior in a well defined etching plasma environment in a RIE mode was investigated. The 40.68 MHz driven bottom electrode generates higher etch rates combined with much lower bias voltages by a factor of ten or a higher efficiency of the plasma with lower damaging of the probe material. The goal was to obtain a well-defined process for the removal and structuring of SU8 and BCB using fluorine/oxygen chemistry, defined using variables like electron density and collision rate. The plasma parameters are measured and varied using a production proven technology called SEERS (Self Excited Electron Resonance Spectroscopy). Depending on application and on Polymer several metals are possible (e.g., gold, aluminum). The characteristic of SU8 and BCB was examined in the case of patterning by dry etching in a CF₄/O₂ chemistry. Etch profile and etch rate correlate surprisingly well with plasma parameters like electron density and electron collision rate, thus allowing to define to adjust etch structure in situ with the help of plasma parameters.

SU-8, negative-tone epoxy base, photoresist has a great potential for ultra-thick high aspect ratio structures in low cost micro-fabrication technologies. Commercial formulation of NanoTM SU-8 2075 is investigate, process limitations are discuss. Good layer uniformity (few %) for single layer up to 200 μm could be obtained in a covered RC8 (Suss-MicroTec) spin coater, but for ultra-thick microstructures it is also possible to cast on the wafer a volume controlled of resist up to 1.5 mm without barrier. Long baking times are necessary for a well process control. The layout of the photo-masks design and process parameters have great impact on residual stress effects and adhesion failures, especially for dense SU-8 patterns on metallic under layer deposited on silicon wafers. A specific treatment applied before the resist coating definitely solved this problem. Bio-fluidic applications of on-wafer direct prototyping (silicon, glass, plastics) are presented. An example will be given on prototyping dielectophorectic micro-cell manipulation component. The SU-8 fluidic structure is made by a self planarized multi-level process (application for 2,5 to 3D microstructures). Biotechnology applications of integrated micro-cells could be considered thanks to the SU-8 good resistance to PCR (Polymerase Chain Reaction). Future developments are focusing on the SU-8 capabilities for Deep Reactive Ion Etching of plastic and 3D shaping of microstructures using a process called : Multidirectional Inclined Exposure Lithography (MIEL).

Poly-methylmethacrylate (PMMA), a positive resist, is the most commonly used resist for deep X-ray lithography (DXRL)/LIGA technology. Although PMMA offers superior quality with respect to accuracy and sidewall roughness but it is also extremely insensitive. In this paper, we present our research results on SU-8 as negative resist for deep X-ray lithography. The results show that SU-8 is over two order of magnitude more sensitive to X-ray radiation than PMMA and the accuracy of the SU-8 microstructures fabricated by deep X-ray lithography is superior to UV-lithography and comparable to PMMA structures. The good pattern quality together with the high sensitivity offers rapid prototyping and direct LIGA capability. Moreover, the combinational use of UV and X-ray lithography as well as the use of positive and negative resists made it possible to fabricate complex multi-level 3D microstructures. The new process can be used to fabricate complex multi-level 3D structures for MEMS, MOEMS, Bio-MEMS or other micro-devices.

In recent year SU-8 has became the most attractive photoresist in both optical and x-ray lithography. In our early work we have optimized its exposure parameters to improve the patterning quality in UV lithography and concluded that the UV absorption in SU-8 is proportional to the concentration of photoacidgenerator (PAG) and limiting the applicable SU-8 thickness in UV lithography. Actually, the PAG concentration plays an important role in all aspects of SU-8 processing in both optical and x-ray lithography. The motivation of this work is to expand the applicable thickness and application scope and improve processing control of SU-8 by optimizing its PAG concentration. In this paper we present the most recent experimental results on lithographic performance of SU-8 with different PAG concentration (varying up to 2 orders of magnitude). It includes determining the minimum bottom dose and minimum effective energy density in x-ray and UV lithography of SU-8, respectively, observing the dimensional change of SU-8 microstructure at different post exposure bake (PEB) temperature and time and measuring UV absorption spectrum of SU-8 as the function of PAG concentration. The modified SU-8 resists have moderate sensitivities and lower absorption coefficients. The application of the modified SU-8 will be addressed and demonstrated.

Paper pending release of an erratum.

A novel structure employing Dow Chemical (Midland, MI) benzocyclobutene (BCB) Cyclotene as a diaphragm material is presented in this report. The main advantages of this BCB diaphragm are its low thermal conductivity, robustness, chemical inertness, low curing temperature and high structure yield. Moreover, a BCB film can be either photo-defined or plasma etched and is a suitable micromachining material for post IC processing. Micromachined IR thermopile single detectors and lineal detector arrays (1×16), using BiSeTeSb/BiSbTe sensing elements on BCB diaphragms, have been constructed and tested. Up to 100% structure yield has been obtained. The process used to realize this detector structure is compatible with the eventual inclusion of on-chip circuitry for signal amplification and conditioning.

A new replication technology that produces, high aspect ratio ceramic or metal microparts by micromolding and sintering nanoparticle preforms is presented. In this LIGA replication technique, an epoxy based nanoparticle slurry is cast into sacrificial plastic micromolds produced by injection molding. The epoxy is allowed to cure and, if desired, excess epoxy is polished off to produce individual micropart preforms. The micromold is then dissolved in methylene chloride and the micropart preforms are sintered in either air (oxide ceramics) or 4% hydrogen in argon (nickel). This presentation will discuss the effects of the epoxy formulation, the microcasting procedure, and the sintering schedule on the materials properties of the final sintered microparts. It will be shown that this replication technique produces ceramic or metal microparts with micron size features and mechanical properties comparable to those of macroscopic materials.

A novel process for the rapid replication of electroforming plastic micromolds has been developed and is now being used to produce plated nickel test specimens. The process combines hot embossing or injection molding with metallic microscreens to produce sacrificial electroforming molds with conducting bases and insulating sidewalls. The replicated micromolds differ from standard LIGA molds in that the holes in the microscreen act as insulating defects in the electroforming base. The effects of such defects on the materials properties of electroformed microparts will be discussed and it will be shown that when the surface irregularities corresponding to the microscreen holes are removed, mechanical properties are experimentally indistinguishable from those found in conventionally processed LIGA specimens.

The use of silver filled PMMA as a sacrificial layer for the fabrication of multilevel LIGA microparts is presented. In this technique, a bottom level of standard electroformed LIGA parts is first produced on a metallized substrate such as a silicon wafer. A methyl methacrylate formulation mixed with silver particles is then cast and polymerized around the bottom level of metal parts to produce a conducting sacrificial layer. A second level of PMMA x-ray resist is adhered to the bottom level of metal parts and conducting PMMA and patterned to form another level of electroformed features. This presentation will discuss some the requirements for the successful fabrication of multilevel, cantilevered LIGA microparts. It will be shown that by using a silver filled PMMA, a sacrificial layer can be quickly applied around LIGA components; cantilevered microparts can be electroformed; and the final parts can be quickly released by dissolving the sacrificial layer in acetone.

Current deep trench etch systems are able to etch two micron wide features ten’s of microns deep into a silicon substrate. Conformal chemical vapor deposition (CVD) processes are readily able to fill the trenches with reasonable deposition thickness by growing from the sidewalls in. We have used this approach to demonstrate 30 micron thick tungsten structural members integrated with 30 micron thick silicon nitride electrical isolation. The moving tungsten and silicon nitride structures are suspended 15 microns off the surface of the substrate by silicon nitride posts. Planarity is maintained throughout the process.

This paper describes a process to fabricate three-dimensional multilevel high-aspect-ratio microstructures (HARMs) for magnetoelectronic devices using aligned x-ray lithography in conjunction with electrodeposition. In this process, x-ray masks were constructed on a seed layer coated polyimide membrane with ultraviolet (UV) patterned and electrodeposited gold absorbers. The optically transparent polyimide allows one to align and print large areas (>4 inch in diameter) with high alignment accuracies. Patterns that contain 5-10 μm diameter posts and 7-10 μm wide lines were printed to 100-120 μm polymethyl methacrylate (PMMA) resist prepared on silicon wafers using x-ray lithography. Nickel-iron was electroplated to form ferromagnetic HARMs, while electroplated gold formed circuits. The composition profile measured with an electron probe x-ray microanalyzer (EPMA) suggested that iron content increases as NiFe plating proceeds inside the recess. The electrodeposition resulted in well-defined NiFe structures with aspect-ratios up to 20:1, smooth sidewalls and top surfaces. To isolate the magnetic structures and circuits, both wet chemical etching and sputter etching were explored to remove seed layer, and the latter yielded complete removal without noticeable damage to the features. A complete aligned x-ray exposure and electrodeposition protocol applicable to universal multilevel microstructures was established.

Considerable difficulties and limitations are associated with the patterning of thick photoresist layers to generate high aspect ratio features in MEMS fabrication. Moreover, a large number of steps is needed to achieve the patterned MEMS structures. The PMOD methodology takes advantage of direct patterning of a photoimageable, highly etch resistant inorganic metal oxide precursor to form the hard mask. A spin coated thin TiO₂ film deposited onto a Novolac transfer layer has been evaluated. An etch ratio of 850:1 between Novolac resin and TiO₂ thin-film has been achieved by oxygen gas RIE. One set of process parameters demonstrated vertical sidewalls on 10 m thick Novolac using a 20 nm patterned TiO₂ thin-film. Photo resolution of the TiO₂ films as small as 0.5 m has been demonstrated using a contact aligner. In addition to applying our process to silicon substrates, we have also demonstrated the feasibility of patterning on ceramic alumina substrates. The plasma-etch residues and the PMOD film were removed by wet chemical cleaning solutions developed at EKC Technology.

Secondary radiation during LIGA PMMA resist exposure adversely affects feature definition, sidewall taper and overall sidewall offset. Additionally, it can degrade the resist adjacent to the substrate, leading to the loss of free-standing features through undercutting during resist development or through mechanical failure of the degraded material. The source of this radiation includes photoelectrons, Auger electrons, fluorescence photons, etc. Sandia’s Integrated Tiger Series (ITS), a coupled electron/photon Monte Carlo transport code, was used to compute dose profiles within 1 to 2 microns of the absorber edge and near the interface of the resist with a metallized substrate. The difficulty of sub-micron resolution requirement was overcome by solving a few local problems having carefully designed micron-scale geometries. The results indicate a 2-μm dose transition region near the absorber edge resulting from PMMA’s photoelectrons. This region leads to sidewall offset and to tapered sidewalls following resist development. The results also show a dose boundary layer of around 1 μm near the substrate interface due to electrons emitted from the substrate metallization layer. The maximum dose at the resist bottom under the absorber can be very high and can lead to feature loss during development. This model was also used to investigate those resist doses resulting from multi-layer substrate.

High-aspect ratio micro-fabrication of crosslinked polytetrafluoroethylene (PTFE) has been carried out using synchrotron radiation (SR) direct photo-etching. The etching rates of crosslinked PTFE samples with various crosslinked densities were studied by changing photon fluence of SR at different sample temperatures. The maximum etching rate of 150 micron/min was achieved at SR beam current of 600 mA. The etching rate of the sample with higher crosslinking density resulted in a higher etching rate. This rate was about two times higher than that of non-crosslinked PTFE. The effects of molecular motion and fragmentation of the molecules on etching process were discussed from temperature dependence on etching rate. Furthermore, we have found that surface modification of non-crosslinked PTFE had been proceeding during irradiation of SR to the surfaces at 140 °C. The modified surfaces were examined on behavior of crystallites by differential scanning calorimetry, and on chemical structure by FTIR spectroscopy and solid-state F NMR spectroscopy. The results showed that properties of modified layers have dependence on depth. Crosslinking reaction would be induced by SR irradiation even in its solid state within about 50 μm from the surface.

The normal process to fabricate an x-ray mask involves two steps: make an optical mask by using an optical pattern generator (OPG), and form the pattern on the x-ray mask membrane with the optical mask by UV lithography. The sole function of the optical mask is the pattern transfer from source to target. It is always possible that pattern distortion would happen during its transference. In this paper we present a new process to fabricate deep x-ray lithography (DXRL) mask by direct pattern writing on the first layer of resist of an x-ray mask membrane. A thin layer of gold (1 ~ 2 μm) is deposited on the revealed plating base of the membrane and serves as the absorber for a following x- ray exposure of the second (thicker) layer of resist. Finally a thick (5-10 μm) gold layer is plated in the stencil formed by developed second layer of resist. This process has been demonstrated with Kapton membranes (Polyimide foil). The principle of the process can be applied to other x-ray mask membrane materials and to make ultra deep x-ray lithography (UDXRL) mask as well. In this paper the initial results of the new process are presented. The performance of the fabricated mask is evaluated and the alternative approaches will be discussed.

X-ray lithography is commonly used to build high aspect ratio microstructures (HARMS) in a 1:1 proximity printing process. HARMS fabrication requires high energy X-rays to pattern thick resist layers; therefore the absorber thickness of the working X-ray mask needs to be 10-50 μm in order to provide high contrast. To realize high resolution working X ray masks, it is necessary to use intermediate X-ray masks which have been fabricated using e beam or laser lithographic techniques. The intermediate masks are characterized by submicron resolution critical dimensions (CD) but comparatively lower structural heights (~2 μm). This paper mainly focuses on the fabrication of high resolution X-ray intermediate masks. A three-step approach is used to build the high resolution X-ray masks. First, a so called initial mask with sub-micron absorber thickness is fabricated on a 1 μm thick silicon nitride membrane using a 50KeV e beam writer and gold electroplating. The initial X-ray mask has a gold thickness of 0.56 μm and a maximum aspect ratio of 4:1. Soft X-ray lithography and gold electroplating processes are used to copy the initial mask to form an intermediate mask with 1 μm of gold. The intermediate mask can be used to fabricate a working X-ray mask by following a similar set of procedures outlined above.

During the past few years, graphite based X-ray masks have been in use at CAMD and BESSY to build a variety of high aspect ratio microstructures and devices where low side wall surface roughness is not needed In order to obtain lower sidewall surface roughness while maintaining the ease of fabrication of the graphite based X-ray masks, the use of borosilicate glass was explored. A borosilicate glass manufactured by Schott Glas (Mainz, Germany) was selected due to its high purity and availability in ultra-thin sheets (30 μm). The fabrication process of the X-ray masks involves the mounting of a 30 μm glass sheet to either a stainless steel ring at room temperature or an invar ring at an elevated temperature followed by resist application, lithography, and gold electroplating. A stress free membrane is obtained by mounting the thin glass sheet to a stainless steel ring, while mounting on an invar ring at an elevated temperature produces a pre-stressed membrane ensuring that the membrane will remain taut during X-ray exposure. X-ray masks have been produced by using both thick negative- and positive-tone photoresists. The membrane mounting, resist application, lithography, and gold electroplating processes have been optimized to yield X-ray masks with absorber thicknesses ranging from 10 μm to 25 μm. Poly(methyl methacrylate) layers of 100 μm to 400 μm have been successfully patterned using the glass membrane masks.

Embossing of microscale features into Pb and Zn was carried out using LIGA (Lithographie, Galvanoformung, Abformung) fabricated Ni mold inserts with features 100 microns in diameter and 500 microns in height. Molding was carried out at 300 °C with both uncoated Ni inserts and Ni inserts coated with Ti-containing hydrocarbon (Ti-C:H). The coatings were applied using a high-density inductively coupled plasma (ICP) assisted hybrid chemical vapor deposition (CVD)/physical vapor deposition (PVD) technique. This technique is shown to produce coatings conformally onto LIGA fabricated high aspect ratio microstructures (HARMs). The performance of the molding process was characterized using scanning electron microscopy (SEM) and energy-dispersive x-ray spectroscopy both in terms of the features generated and the insert condition after molding. The present results indicate that in molding metals that are not reactive with Ni no coating is necessary to produce the microfeatures. This study also demonstrates that in molding Zn, where significant metal/insert chemical interactions exist, surface engineering of the mold insert is necessary to obtain satisfactory performance. Conformal deposition of engineered ceramic coatings onto Ni microscale mold inserts is an effective means for achieving micromolding of reactive metals.

Thinning of micromachined wafers containing trenches and cavities to realize through-chip interconnects is presented. Successful thinning of wafers by lapping and polishing until the cavities previously etched by deep reactive ion etching are reached is demonstrated. The possible causes of damage to the etched structures are investigated. The trapping of particles in the cavities and suitable cleaning procedures to address this issue are studied. The results achieved so far allow further processing of the thinned wafers to form through wafer interconnections by copper electroplating. Further improvement of the quality of thinned surfaces can be achieved by alternative cleaning procedures.

A laser-induced chemical vapor deposition (LCVD) process is capable of producing high aspect ratio microstructures of arbitrary shape and is rapid, flexible, and relatively inexpensive to operate. To achieve high resolution and accurate fabrication, predictive models must be developed for process control and optimization. In this paper, we present an inverse model for predicting and optimizing the scanning pattern of the laser beam on the surface of deposit in order to produce accurate microstructures with the desired geometry. We demonstrate the applicability of the model by simulating and optimizing the process for fabricating a microlens with a pre-specified geometry.

Laser-induced Chemical Vapor Deposition (LCVD) is an emerging technique in freeform fabrication of high aspect ratio microstructures with many practical applications. The LCVD process is kinetically limited at low temperatures and pressure. The growth rate rises exponentially with temperature and becomes mass transport limited beyond a certain threshold. While the surface temperature drives the deposition rate of a heterogeneous pyrolytic reaction, the rate obtained depends on the reaction activation energy and the ability of the precursor reactants and by-products to transport to and from the surface. To achieve precise control of the thermal deposition near the focus of a laser beam, a mathematical model for 3-D LCVD is developed taking into account both kinetically limited and mass transport limited reactions. The model describes heat transport in the substrate and deposit as well as the gas-phase mass transport and temperature in the reaction zone in order to determine growth rate. A finite difference method is developed for solving the governing equations and an iterative algorithm is presented for simulating the process. The applicability of the model is demonstrated by growing a rod from silicon deposited on a graphite substrate.

The effect of pre-baking conditions on the resolution and aspect ratio of thick-film resists is examined in order to improve resist processing performance. Resist samples are pre-baked at various temperatures and for various baking times, and a range of resist properties are examined. It is found that the pre-baking conditions affording the best resist pattern profile and development contrast are 125 °C for 7 min. The mechanisms responsible for the observed variations in pattern profile are studied by comparing and simulating the development activation energy, the change in the amount of solvent and photo active compound (PAC) during pre-baking, the residual solvent amount in the resist, and the transmission after pre-baking. The results indicate that there are two factors responsible for retarding the pattern formation process and causing degradation of pattern profile and resolution. One mechanism is N₂ bubbling during development, which is caused by N₂ trapped in residual solvent during exposure. The other mechanism is thermal decomposition of the PAC during baking, which weakens the retardation of development unexposed resist.

In present paper the longitudinal and transverse thermomagnetic Nernst-Ettingshausen effects and also magnetoresistance were investigated at high pressure chambers with sintered diamond anvils near semiconductor-metal transition points. Chalcogens (Te, Se) and chalcogenides (PbS, PbSe, PbTe) semiconductor micro-samples have been chosen as an objects for experimental study. The calculations of thermo- and galvanomagnetic properties of heterophase materials as a function of inclusion concentration and configuration were performed in the model of the oriented inclusions model with variable phase configuration. Both the approach and experimental technique developed seems to be perspective for using in micro-device technology for quality control and advanced semiconductor manufacturing. The work was supported by the Russian Foundation for Basic Research (RFBR), Gr.No.01-02-17203.

During the last decade rapid prototyping has made a tremendous success in almost every branch of industrial fabrication. Almost every article of today’s life is pre-fabricated in a rapid process during its design. Functional rapid prototypes represent an increasing share, as they allow realistic functional tests of a component in an early stage of development. MEMS technology is still at the beginning of the rapid prototyping aera. Up to now, only a few conventional techniques, like stereolithography, have been downscaled to create rapid microprototypes with a limited choice of materials and geometries. Rapid prototyping of silicon is completely out of reach today. In this paper we propose a micro rapid prototyping concept for functional silicon microstructures. The process combines laser technology with standard processes of silicon microstructuring and has been evaluated with a metal-silicon layer system. First, noble metal is vapour deposited on top of a silicon wafer. The metal is subsequently structured with a laser, thus creating a mask, which can be transferred into the silicon by standard chemical etching procedures like KOH-etch. The advantage of this concept is that the time-consuming photomask generation is omitted completely, as the laser can be guided with CAD data. Moreover, the standard structuring process gives the opportunity to gain a microstructure with features equivalent to the final component. With laser ablation and KOH-etch two process steps are being carried out subsequently, which are inevitably linked to each other. Depending on the energy of the laser irradiation the ablation performance changes and, with it, the minimal structure width and the thermal melting zone at the edges of the mask openings. If the energy density is too high the crystalline structure of the silicon is destroyed by heat transfer and heat conduction. Hereby the anisotropic etch resistance is lost, which influences the following KOH-etch process. At the current state the process is monitored and optimised for different values of laser energy density. In this progress report the optimisation and the principal feasibility will be shown with simple micromechanic and microfluidic structures.

Although MEMS technologies and device structures have made significant progress in the past three decades and have found widespread application in many areas, including Micro-Opto-Electro-Mechanical Systems (MOEMS), packaging and assembly techniques suitable for many of these emerging applications have not kept pace. Packaging is one of the most costly parts of microsystem manufacturing, and it is also often the first to fail or negatively influence the system response. This paper addresses the packaging and assembly challenges of microsystems and MEMS for different applications. Hermetic and vacuum micropackaging, wafer-level packaging and bonding, and miniature sealed interconnection and feedthrough technologies will be reviewed. Results from long-term accelerated testing, and from in-situ tests, especially in biological hosts, will also be discussed. Issues and challenges facing packaging of MOEMS will be discussed.

The NEXUS Association, a European initiative that has established a world-wide Network of users and suppliers of Microsystems, was initially set up in the early 90s to assist European industry exploit the potential of microsystems (MST/MEMS) and microsystem-based technologies. To date, NEXUS members (over 600) have embarked on analysing market opportunities and technology roadmaps for MST/MEMS products and applications. Directed, primarily, by application-driven technology users, NEXUS has initiated a number of tasks to help provide strategic guidance for industry and research to encourage the uptake of the technology beyond its conventional realm. In this context, NEXUS through its User-Supplier-Clubs (USCs), in general, and that for telecommunications (USC-T), in particular, has produced forecasts addressing the potential of microsystems insertion into telecommunication systems over the next 10 years in the context of functionality advancements and network evolution.

Major opportunities for microsystem insertion into commercial applications, such as telecommunications and medical prosthesis, are well known. Less well known are applications that ensure the security of our nation, the protection of its armed forces, and the safety of its citizens. Microsystems enable entirely new possibilities to meet National Security needs, which can be classed along three lines: anticipating security needs and threats, deterring the efficacy of identified threats, and defending against the application of these threats. In each of these areas, specific products that are enabled by MEMS and MOEMS are discussed. In the area of anticipating needs and threats, sensored microsystems designed for chem/bio/nuclear threats, and sensors for border and asset protection can significantly secure our borders, ports, and transportation systems. Key features for these applications include adaptive optics and spectroscopic capabilities. Microsystems to monitor soil and water quality can be used to secure critical infrastructure, food safety can be improved by in-situ identification of pathogens, and sensored buildings can ensure the architectural safety of our homes and workplaces. A challenge to commercializing these opportunities, and thus making them available for National Security needs, is developing predictable markets and predictable technology roadmaps. The integrated circuit manufacturing industry provides an example of predictable technology maturation and market insertion, primarily due to the existence of a “unit cell” that allows volume manufacturing. It is not clear that microsystems can follow an analogous path. The possible paths to affordable low-volume production, as well as the prospects of a microsystems unit cell, are discussed.