Thermal profiling for IC chip high-voltage stress prediction

Sheng-Jen Hsieh; Sung-Ling Huang

doi:10.1117/12.486872

1 April 2003 Thermal profiling for IC chip high-voltage stress prediction

Sheng-Jen Hsieh, Sung-Ling Huang

Proceedings Volume 5073, Thermosense XXV; (2003) https://doi.org/10.1117/12.486872
Event: AeroSense 2003, 2003, Orlando, Florida, United States

Abstract

Integrated Circuit (IC) chips constantly undergo different types of stress in the field, such as thermal, humidity, and electrical stress. Existing work has concentrated on humidity and thermal stress; there has been relatively little emphasis on high-voltage stress level prediction. The objectives of this investigation were to 1) explore the impact of high-voltage stress on IC functionality, (2) observe heating rate changes in chips under high-voltage stress over time, and (3) predict stress levels using artificial neural network models. Three different kinds of IC chips-namely, LM348N Operational Amplifier, LM386N-1 Power Amplifier, and LM555CN Timer Oscillator-were studied. Each chip was taken from a different printed circuit board. An artificial neural network model with a 3-2-1 topology was constructed to predict stress level given heating rate over time. Results indicate (1) high-voltage stress shortens the lifecycle of IC chips, (2) heating rate increases are relatively great in the first few minutes, then reach a steady state, and (3) neural network models can predict stress level with good accuracy. The detection rates for the Amplifier chips (LM348N and LM386N) were 97% and 91%, respectively. The detection rate for the LM555CN chip was around 75%; however those results may be improved with more samples for training and evaluation. In addition, the trainRP learning function resulted in a lower error rate (for the LM348N chip) with the original experimental data than other learning functions such as trainGD and trainCGP. Future directions include the expansion of the study to other types of IC chips, such as memory and microprocessor chips.

Citation Download Citation

Sheng-Jen Hsieh and Sung-Ling Huang "Thermal profiling for IC chip high-voltage stress prediction", Proc. SPIE 5073, Thermosense XXV, (1 April 2003); https://doi.org/10.1117/12.486872

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