Paper
19 April 2004 Video processing on a flexible heterogeneous architecture
Erwin B. Bellers, Johan G. W. M. Janssen, Selliah Rathnam
Author Affiliations +
Proceedings Volume 5309, Embedded Processors for Multimedia and Communications; (2004) https://doi.org/10.1117/12.527223
Event: Electronic Imaging 2004, 2004, San Jose, California, United States
Abstract
Video Processing algorithms, and in particular those found in high-end television receivers, often have challenging demands for system resources. Therefore, most often, dedicated IC solutions are proposed to meet both the system and economic constraints. However as the functional requirements increase and as more diversity in terms of application support is required, dedicated solutions become less economic attractive, and hence a more heterogeneous architecture becomes more economic. In this paper, we present an architecture that is suited to run multiple very demanding video processing applications in real-time for consumer market applications.
© (2004) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Erwin B. Bellers, Johan G. W. M. Janssen, and Selliah Rathnam "Video processing on a flexible heterogeneous architecture", Proc. SPIE 5309, Embedded Processors for Multimedia and Communications, (19 April 2004); https://doi.org/10.1117/12.527223
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KEYWORDS
Video

Video processing

Denoising

Computing systems

On-screen displays

Televisions

Internet

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