Microcontroller signal density stress prediction framework

Sheng-Jen Hsieh; Sung-Ling Huang; Shao-Chin Chang

doi:10.1117/12.542439

12 April 2004 Microcontroller signal density stress prediction framework

Sheng-Jen Hsieh, Sung-Ling Huang, Shao-Chin Chang

Proceedings Volume 5405, Thermosense XXVI; (2004) https://doi.org/10.1117/12.542439
Event: Defense and Security, 2004, Orlando, Florida, United States

Abstract

Studies of electronic component stress have typically focused on temperature, humidity, and voltage stress. There has been relatively little emphasis on clock signal frequency stress. This study investigated effects of clock frequency stress on a high performance microcontroller used to control the on-off frequency of LEDs on a printed circuit board. Based on the design specification, several frequency levels between 0 and the terminal clock frequency were selected. Thermal profile samples for each stress level were collected using an infrared camera. The data were then divided into two groups for model development and evaluation. Artificial neural network and statistical regression approaches were used to model thermal profiles for each stress level. Objectives were to (1) explore impact of clock frequency stress on IC functionality, (2) observe heating rate differences under clock frequency stress over time; and (3) predict stress levels using the two approaches. Results indicate that the average prediction error is about 7.9% for the neural network approach and about 23.8% for the statistical regression approach. Future directions include thermal profile modeling using Finite Element Analysis (FEA) and development of robust hybrid analytic and experimental models for microcontroller lifetime prediction.

Citation Download Citation

Sheng-Jen Hsieh, Sung-Ling Huang, and Shao-Chin Chang "Microcontroller signal density stress prediction framework", Proc. SPIE 5405, Thermosense XXVI, (12 April 2004); https://doi.org/10.1117/12.542439

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