Accurate in-line CD metrology for nanometer semiconductor manufacturing

Baw-Ching Perng; Jyu-Horng Shieh; S.-M. Jang; M.-S. Liang; Renee Huang; Li-Chien Chen; Ruey-Lian Hwang; Joe Hsu; David Fong

doi:10.1117/12.655986

24 March 2006 Accurate in-line CD metrology for nanometer semiconductor manufacturing

Baw-Ching Perng, Jyu-Horng Shieh, S.-M. Jang, M.-S. Liang, Renee Huang, Li-Chien Chen, Ruey-Lian Hwang, Joe Hsu, David Fong

Author Affiliations +

Proceedings Volume 6152, Metrology, Inspection, and Process Control for Microlithography XX; 61520Q (2006) https://doi.org/10.1117/12.655986
Event: SPIE 31st International Symposium on Advanced Lithography, 2006, San Jose, California, United States

Abstract

The need for absolute accuracy is increasing as semiconductor-manufacturing technologies advance to sub-65nm nodes, since device sizes are reducing to sub-50nm but offsets ranging from 5nm to 20nm are often encountered. While TEM is well-recognized as the most accurate CD metrology, direct comparison between the TEM data and in-line CD data might be misleading sometimes due to different statistical sampling and interferences from sidewall roughness. In this work we explore the capability of CD-AFM as an accurate in-line CD reference metrology. Being a member of scanning profiling metrology, CD-AFM has the advantages of avoiding e-beam damage and minimum sample damage induced CD changes, in addition to the capability of more statistical sampling than typical cross section metrologies. While AFM has already gained its reputation on the accuracy of depth measurement, not much data was reported on the accuracy of CD-AFM for CD measurement. Our main focus here is to prove the accuracy of CD-AFM and show its measuring capability for semiconductor related materials and patterns. In addition to the typical precision check, we spent an intensive effort on examining the bias performance of this CD metrology, which is defined as the difference between CD-AFM data and the best-known CD value of the prepared samples. We first examine line edge roughness (LER) behavior for line patterns of various materials, including polysilicon, photoresist, and a porous low k material. Based on the LER characteristics of each patterning, a method is proposed to reduce its influence on CD measurement. Application of our method to a VLSI nanoCD standard is then performed, and agreement of less than 1nm bias is achieved between the CD-AFM data and the standard's value. With very careful sample preparations and TEM tool calibration, we also obtained excellent correlation between CD-AFM and TEM for poly-CDs ranging from 70nm to 400nm. CD measurements of poly ADI and low k trenches are also reported, and both show good correlation to in-line CD-SEM results.

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Baw-Ching Perng, Jyu-Horng Shieh, S.-M. Jang, M.-S. Liang, Renee Huang, Li-Chien Chen, Ruey-Lian Hwang, Joe Hsu, and David Fong "Accurate in-line CD metrology for nanometer semiconductor manufacturing", Proc. SPIE 6152, Metrology, Inspection, and Process Control for Microlithography XX, 61520Q (24 March 2006); https://doi.org/10.1117/12.655986

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