Paper
24 March 2006 Comprehensive approach to MuGFET metrology
G. F. Lorusso, P. Leray, T. Vandeweyer, M. Ercken, C. Delvaux, I. Pollentier, S. Cheng, N. Collaert, R. Rooyackers, B. Degroote, M. Jurczak, S. Biesemans, O. Richard, H. Bender, A. Azordegan, J. McCormack, S. Shirke, J. Prochazka, T. Long
Author Affiliations +
Abstract
As we move forward to the 45 and 32nm node, MuGFET's (Multi-Gate Field-Effect Transistor) are considered more and more as a necessary alternative to keep pace with Moore's Law. If proven manufacturable, MuGFET's could eventually replace conventional CMOS transistors within a few years. The ability to perform proper and extensive metrology in a production environment is then essential. We investigate here some of the requirements of MuGFET metrology. Accuracy and line width roughness (LWR) metrology will play an essential role, because the small dimension of the features involved. 3D metrology is required when dealing with non-planar devices. Sophisticated check of optical proximity correction (OPC) is needed in order to ensure that the design is respected. We propose here some possible solutions to address the needs of MuGFET metrology in a production-worthy fashion. A procedure to calibrate CDSEM to TEM for accuracy is developed. We performed LWR metrology of fins in a fully automated way by using CDSEM, while the 3D information is obtained by means of scatterometry. Finally, we will discuss the application of design-based metrology (DBM) to MuGFET OPC validation.
© (2006) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
G. F. Lorusso, P. Leray, T. Vandeweyer, M. Ercken, C. Delvaux, I. Pollentier, S. Cheng, N. Collaert, R. Rooyackers, B. Degroote, M. Jurczak, S. Biesemans, O. Richard, H. Bender, A. Azordegan, J. McCormack, S. Shirke, J. Prochazka, and T. Long "Comprehensive approach to MuGFET metrology", Proc. SPIE 6152, Metrology, Inspection, and Process Control for Microlithography XX, 615219 (24 March 2006); https://doi.org/10.1117/12.656076
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Cited by 7 scholarly publications.
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KEYWORDS
Metrology

Line width roughness

Scatterometry

Oxides

Semiconducting wafers

3D metrology

Calibration

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