Improvement of pipelines implementations in FPGA designs

Nonel Thirer; Yitzhak David; I. Baal Zedaka; Uzi Efron

doi:10.1117/12.678445

7 September 2006 Improvement of pipelines implementations in FPGA designs

Nonel Thirer, Yitzhak David, I. Baal Zedaka, Uzi Efron

Proceedings Volume 6294, Infrared and Photoelectronic Imagers and Detector Devices II; 62940T (2006) https://doi.org/10.1117/12.678445
Event: SPIE Optics + Photonics, 2006, San Diego, California, United States

Abstract

System architecture has a significant impact on software performance. In this manuscript, a method to increase the performance of the microprocessors and FPGA based systems using pipeline processing, is presented. An improved implementation using this concept, for image and display processing, providing real time vision applications, is described.

Citation Download Citation

Nonel Thirer, Yitzhak David, I. Baal Zedaka, and Uzi Efron "Improvement of pipelines implementations in FPGA designs", Proc. SPIE 6294, Infrared and Photoelectronic Imagers and Detector Devices II, 62940T (7 September 2006); https://doi.org/10.1117/12.678445

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