Paper
20 October 2006 Phase-shift reticle design impact on patterned linewidth variation and LWR
Jim Vasek, Chong-Cheng Fu, Gong Chen
Author Affiliations +
Abstract
Across-chip and across-wafer patterned linewidth variation (ACLV and AWLV respectively) as well as linewidth roughness (LWR) are key contributors to device performance variation. For polysilicon gate patterning, the linewidth control enabled by various phase-shift mask (PSM) design approaches is one of the key metrics in selecting the most manufacturable process. Embedded attenuated PSM (6% EAPSM), chromeless PSM (CPL) and alternating aperture PSM (AAPSM) designs were selected for comparison. Polysilicon wafers were exposed with 193nm lithography using these reticles, and then ACLV, AWLV and LWR were measured for each PSM process. The results are discussed and compared with other reticle design factors important for effective 65nm node patterning in production.
© (2006) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Jim Vasek, Chong-Cheng Fu, and Gong Chen "Phase-shift reticle design impact on patterned linewidth variation and LWR", Proc. SPIE 6349, Photomask Technology 2006, 63491S (20 October 2006); https://doi.org/10.1117/12.686594
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KEYWORDS
Photomasks

Critical dimension metrology

Reticles

Manufacturing

Line width roughness

Optical proximity correction

Semiconducting wafers

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