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The fate of optical-based lithography hinges on the ability to deploy viable resolution enhancement techniques (RET).
One such solution is double patterning (DP). Like the double-exposure technique, double patterning is a decomposition
of the design to relax the pitch that requires dual masks, but unlike double-exposure techniques, double patterning
requires an additional develop and etch step, which eliminates the resolution degradation due to the cross-coupling that
occurs in the latent images of multiple exposures. This additional etch step is worth the effort for those looking for an
optical extension [1]. The theoretical k1 for a double-patterning technique of a 32nm half-pitch (HP) design for a
1.35NA 193nm imaging system is 0.44 whereas the k1 for a single-exposure technique of this same design would be 0.22
[2], which is sub-resolution. There are other benefits to the DP technique such as the ability to add sub-resolution assist
features (SRAF) in the relaxed pitch areas, the reduction of forbidden pitches, and the ability to apply mask biases and
OPC without encountering mask constraints.
Similarly to AltPSM and SRAF techniques one of the major barriers to widespread deployment of double patterning to
random logic circuits is design compliance with split layout synthesis requirements [3]. Successful implementation of
DP requires the evolution and adoption of design restrictions by specifically tailored design rules.
The deployment of double patterning does spawn a couple of issues that would need addressing before proceeding into a
production environment. As with any dual-mask RET application, there are the classical overlay requirements between
the two exposure steps and there are the complexities of decomposing the designs to minimize the stitching but to
maximize the depth of focus (DoF). In addition, the location of the design stitching would require careful consideration.
For example, a stitch in a field region or wider lines is preferred over a transistor region or narrower lines. The EDA
industry will be consulted for these sound automated solutions to resolve double-patterning sensitivities and to go
beyond this with the coupling of their model-based and process-window applications.
This work documented the resolution limitations of single exposure, and double-patterning with the latest hyper-NA
immersion tools and with fully optimized source conditions. It demonstrated the best known methods to improve design
decomposition in an effort to minimize the impact of mask-to-mask registration and process variance. These EDA
solutions were further analyzed and quantified utilizing a verification flow.
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