Accelerating physical verification using STPRL: a novel language for test pattern generation

Ahmed Nouh

doi:10.1117/12.736545

3 May 2007 Accelerating physical verification using STPRL: a novel language for test pattern generation

Ahmed Nouh

Author Affiliations +

Proceedings Volume 6533, 23rd European Mask and Lithography Conference; 65331I (2007) https://doi.org/10.1117/12.736545
Event: European Mask and Lithography Conference2007, 2007, Grenoble, France

Abstract

In this work, test-patterns, test-cases and layout-patterns generations are widely investigated in the sense of turnaround time for creation and/or modification. STPRL, a novel behavioral modeling language for test-pattern creation, is being proposed. The turn-around time for both creation and modification is hugely reduced at no degradation in either accuracy or performance. Furthermore, STPRL provides considerable performance improvements in custom test-patterns creation over available automatic layout creation tools. Our method has been verified with real data at different node-technologies and for migration from and between different technology nodes.

Citation Download Citation

Ahmed Nouh "Accelerating physical verification using STPRL: a novel language for test pattern generation", Proc. SPIE 6533, 23rd European Mask and Lithography Conference, 65331I (3 May 2007); https://doi.org/10.1117/12.736545

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