Paper
3 June 2011 NIOS II processor-based acceleration of motion compensation techniques
Diego González, Guillermo Botella, Soumak Mookherjee, Uwe Meyer-Bäse, Anke Meyer-Bäse
Author Affiliations +
Abstract
This paper focuses on the hardware acceleration of motion compensation techniques suitable for the MPEG video compression. A plethora of representative motion estimation search algorithms and the new perspectives are introduced. The methods and designs described here are qualified for medical imaging area where are involved larger images. The structure of the processing systems considered has a good fit for reconfigurable acceleration. The system is based in a platform like FPGA working with the Nios II Microprocessor platform applying C2H acceleration. The paper shows the results in terms of performance and resources needed.
© (2011) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Diego González, Guillermo Botella, Soumak Mookherjee, Uwe Meyer-Bäse, and Anke Meyer-Bäse "NIOS II processor-based acceleration of motion compensation techniques", Proc. SPIE 8058, Independent Component Analyses, Wavelets, Neural Networks, Biosystems, and Nanoengineering IX, 80581C (3 June 2011); https://doi.org/10.1117/12.883684
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CITATIONS
Cited by 2 scholarly publications.
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KEYWORDS
Motion estimation

Video coding

Digital signal processing

Video compression

Standards development

Video

Field programmable gate arrays

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