Paper
10 May 2012 Common hardware-in-the-loop framework development
Hajin Kim, Roger Billings, Richard D. Mohlere, Stephen G. Moss, Charles B. Naumann
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Abstract
An approach to streamline the Hardware-In-the-Loop simulation and test process is under development. This technique will attempt to provide a more flexible, scalable system. The overall goal of the system will be to reduce cost by minimizing redundant development, operational labor and equipment expense. This paper will present historical progress and current test results.
© (2012) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Hajin Kim, Roger Billings, Richard D. Mohlere, Stephen G. Moss, and Charles B. Naumann "Common hardware-in-the-loop framework development", Proc. SPIE 8356, Technologies for Synthetic Environments: Hardware-in-the-Loop XVII, 83560O (10 May 2012); https://doi.org/10.1117/12.923090
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KEYWORDS
Field programmable gate arrays

Video

Auroras

Clocks

Transceivers

Solar concentrators

Standards development

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