Paper
28 May 2014 Dimensional metrology on a semiconductor packaging process using an optical comb
Author Affiliations +
Abstract
With the advent of smart devices, the semiconductor packaging process has been proposed to realize devices that have high performance devices and compact size. Several silicon wafers are stacked vertically to create 3 dimensional devices with a high degree of integration. In this process, we measured two important parameters: the thickness of the silicon wafers and the depth and diameter of the through-silicon vias, which are vertical electrical connection lines between the stacked silicon wafers. To avoid pattern distortion and failure during the optical lithography process, the absolute value of the thickness as well as the thickness uniformity needed to be measured. The proposed method directly extracts the geometrical thickness from optical thickness. Because short through-silicon vias lead to disconnection between the silicon wafers, and narrow though-silicon vias may cause voids, the depth and diameter of the through-silicon vias must also be measured accurately. For these purposes, we propose two high-speed optical interferometers based on spectrum-domain analysis. The light source was a femtosecond pulse laser which has the advantages of a wide-spectral bandwidth, high peak power and long coherence length. The measurement uncertainty of the thickness was estimated to be 100 nm (k=2) in the range of 100 mm. The depth and diameter of the through-silicon vias were measured at the same time with a measurement resolution of 10 nm and 100 nm, respectively. It is expected that the proposed interferometers will be used for on-line metrology and inspection as well as new metrological methods for dimensional standards.
© (2014) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Jungjae Park, Jonghan Jin, and Saerom Maeng "Dimensional metrology on a semiconductor packaging process using an optical comb", Proc. SPIE 9110, Dimensional Optical Metrology and Inspection for Practical Applications III, 91100O (28 May 2014); https://doi.org/10.1117/12.2049522
Advertisement
Advertisement
RIGHTS & PERMISSIONS
Get copyright permission  Get copyright permission on Copyright Marketplace
KEYWORDS
Semiconducting wafers

Silicon

Wafer-level optics

Interferometers

Semiconductors

Geometrical optics

Packaging

Back to Top