Since first demonstrating viable Nanosheet technology in the last decade, IBM Research has continued to innovate to bring this technology to the maturity, density, and performance required to be the clear successor to FinFET CMOS technology. This innovation was recently discussed in the latest “2nm node” announcement from IBM. A Nanosheet transistor at these dimensions, with this level of complexity, does not even function (let alone hit yield and performance targets) without significant advancements in metrology and control techniques. This talk will discuss the metrology enablers that foster process breakthroughs, as well as discuss what needs to come next in order to realize the next decade of stacked nanosheet transistor innovation.
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