A number of new packaging technologies are driving the demand for high performance dual-side alignment (DSA) on 300
mm lithography systems. Advanced system in package (SiP) techniques will require through silicon vias to allow very high
density vertical interchip wiring of multiple device stacks. These through silicon vias need to be freely placed in the device
which creates a requirement for tight registration of the back-to-front side alignment. In the MEMS area, wafer level
packaging is being used for applications where the device must interact with the outside environment without performance
restrictions from the packaging. An example is image sensor chips where the charge-coupled device is on the front side and
the electrical interconnects to the signal processing die are on the back side. This application requires dual-side alignment
on a 300 mm bonded silicon glass sandwich structure.
To support these packaging applications a new lithography stepper capable of dual-side alignment on 300 mm wafers has
been developed. This stepper employs an innovative and flexible system for back-to-front side alignment to support a wide
range of packaging applications. This paper discusses the design and integration of the alignment system on a broad band,
low numerical aperture stepper. Experimental target capture for CMOS image sensor applications is shown. Dual-side
overlay performance data on multiple wafers and lots is reviewed.
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