KEYWORDS: Field programmable gate arrays, System on a chip, Interfaces, Sensors, Space operations, Data compression, Digital signal processing, Control systems, Connectors, Electronics
The Digital Processing Unit (DPU) of the SAFARI instrument on board the SPICA satellite will be the bridge between
the Spacecraft Command and Data Management System and the other instrument subsystems. The DPU will implement
Telemetry and Telecommand exchange with the spacecraft, commanding and control of the subsystems, instrument
health monitoring, scientific data acquisition, compression and formatting. The DPU design has been driven by the
requirements for processing power, memory resources and data rates, as well as mass and power budgets. It will be based
on a LEON2-FT processor. All the data interfaces will be implemented using the SpaceWire standard protocols. In this
paper we provide the present status of the DPU design and describe a prototype board developed to study the
performance of the adopted solutions. The prototype board is based on an FPGA where the main DPU processor - a
LEON System on Chip - can be implemented. The breadboard provides the memory, connectivity and expandability
resources that make it a suitable platform for exploring and evaluating a wide range of HW/SW configurations, as
required during the early design phases of the SAFARI DPU. The main characteristics of the proposed processor and of
the performed tests are described as well.
The prototype for a general purpose FPGA based control system for space instrumentation is presented, with particular
attention to the instrument control application software. The system HW is based on the LEON3FT processor, which
gives the flexibility to configure the chip with only the necessary HW functionalities, from simple logic up to small
dedicated processors. The instrument control SW is developed in ANSI C and for time critical (<10μs) commanding
sequences implements an internal instructions sequencer, triggered via an interrupt service routine based on a HW high
priority interrupt.
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