Increase of cost and long turn-around-time (TAT) are becoming hot topics for advanced photomasks. Especially, in the small volume production such as SoC and pilot production, the mask cost and TAT are becoming an important issue for the semiconductor industry. To get rid of these issues, we propose the R-mask (resist shade mask) concept, and in this paper, we will focus on the fabrication techniques of the R-mask. The essential of the R-mask is the simplification of mask fabrication and inspection process. A newly developed e-beam resist, which is able to shield the KrF light, is used as the mask pattern material instead of the chrome. Pellicle is mounted immediately after the mature development process, so that defect density could be reduced. Furthermore, the R-mask concept omits mask cleaning and repair process. We evaluated the newly developed e-beam resist from the standpoint of applicability to mask manufacturing, and we successfully made an R-mask for 180nm metal layer pattern with the new resist. In this paper the process performance of resist is reported.
We have developed a resist-shade mask (R-mask) technology applicable for small-volume production. The R-mask uses a novel resist as a shading material instead of chromium (Cr), and it exhibits sufficient durability against KrF exposure for ASIC and pilot line applications. Because the R-mask does not require a Cr etching process, it can reduce mask costs and improve critical dimension (CD) uniformity. A defect inspection technique for R-masks has also been investigated, and no defects were observed on a wafer for several R-masks used for device fabrication. The part of the R-mask making contact in exposure tools was carefully designed to not retain resist material so as to avoid particle contamination. We applied several R-masks to form wiring layers for 0.25-um and 0.18-um logic devices and confirmed that there were no differences in process margin and product yield between the R-masks and conventional Cr masks.
We have also developed the partial R-mask, which consists of both conventional Cr mask and R-mask areas. The partial R-mask is very effective for customizing semiconductor chips. The R-mask area is applied only to customized circuit areas or certain wiring patterns to adjust circuit characteristics, whereas the common circuit area is delineated by the Cr pattern. The R-mask can be also used to customize attenuated phase-shifting masks, and to make unnecessary hole patterns opaque in prepared hole arrays.
The R-mask is a very promising technology for reducing mask costs and improving the turn-around time (TAT) of masks, because of its simple manufacturing process and reworkable capability.
We propose a new double exposure technique to obtain a balanced intensity profile through focus using an alternating phase-shifting mask (alt-PSM) with a reversed phase. To cancel the intensity imbalance caused by the mask topography and phase error, an additional alt-PSM which has a reversed phase is prepared and exposed at the same position on a wafer. In practical application, two alt-PSMs with reversed phase relative to each other are placed along the scan direction (y-direction) in a 4X-reticle. The imbalanced images are added in a complementary manner by repeating exposure at a half dose and step at a half pitch along the y-direction. The throughput loss can be minimized by using a chip layout with two alt-PSMs in one reticle. The impact of position error between two exposures on lithography performance is discussed, and a 20-nm position error is shown to be tolerable for 80-nm L/S patterns. Both theoretical discussions and experimental data show that even a no Cr-undercut design and a 10° phase error are acceptable. Also, this double exposure technique can lower the risk of defect printing. Such large tolerance regarding the topographical design, phase error, and phase defects is the key to the application of alt-PSM technology in low k1 lithography beyond the 65-nm node.
This paper presents a study of the CD accuracy of phase-edge lithography for 130-nm-node CMOS-gate patterning. In phase- edge lithography, although large process margins are obtained, precise OPC (Optical Proximity effect Correction) is necessary because of large proximity effect. Rule-based OPC was applied to phase-edge gate patterns (Lg equals 100 nm) with KrF exposure in fabricating 130-nm CMOS LSIs. Proximity effects due to pattern variations in the arrangement of the phase shift mask, the effect of double exposure, the micro- loading effect in dry etching and differences between the etching rates for nMOS and pMOS were all corrected. The variations in CD that were due to the proximity effect decreased from +/- 15 nm to +/- 5 nm by applying the OPC. Although the error in CD was decreased, process margins for specific pattern arrangements were degraded by lens aberration. Analysis shows that the image performance of an asymmetric pattern is strongly affected by odd-order aberrations and may reduce the process margins for those patterns. The suppression of lens aberration and symmetric phase-shifting mask designs which are less sensitive to aberrations are essential as ways to achieve highly accurate control of CD in applying the phase-edge method.
Pattern deformation and pattern position shift caused by lens aberration of the exposure tool sis a serious problem. To analyze the effect of lens aberration, lens aberration data are needed. We have therefore developed a new technique to evaluate lens aberration by using an attenuated phase- shifting mask. We firstly measured exposure energy ratio when side-lobe of an octagonal pattern on an attenuated phase-shifting mask was printed at each of the pattern side by sign scanning electron microscope. This ratio is then compared with the ratio of simulated light intensities, and we obtained aberration values, COMA and trefoil errors. To cut down measurements time and improve measurement repeatability, we inspected the wafers to detect formation of side-lobe patterns by using wafer pattern defect inspection system. As a result, automatic measurement time decreased to 20 minutes for 11 by 11 points measurement in one shot. The light intensity simulation show that pattern delineation characteristics are affected by trefoil errors more than by COMA. We can apply this new measurement technique to select a better lens system that will not suffer so much the effect of COMA and trefoil error on pattern delineation.
We propose a new pattern delineation technology where composite phase-shifting masks are used for KrF exposure. Half-tone phase-shifting masks (HTPSMs) are widely used for delineating 0.20- to 0.25-micrometer hole patterns. However, the process latitude of the pattern transfer for 0.18- micrometer hole patterns or smaller is very tight, and it is quite difficult to delineate such small patterns using conventional HTPSMs with KrF exposure for mass production. However, by using a newly developed composite phase-shifting mask, we have been able to simultaneously delineate 0.18- micrometer or smaller isolated hole patterns and dense hole patterns with sufficient process latitude. Two types of phase- shifting technology were integrated in a single phase-shifting mask that had both a Cr region and a halftone region. For the delineation of isolated hole patterns, eight outrigger sub- slots were octagonally arrayed around each isolated hole pattern (00-HTPSM: octagonal outrigger HTPSM). For the delineation of dense hole patterns, an alternating phase assignment was applied (alternating PSM). We found through both simulation and experiment that the focus latitude could be expanded by the use of this composite phase-shifting mask.
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