Controlling a very tight CD budget in Photolithography is one of the challenges of the next technology nodes. The Post
Exposure Bake (PEB) process is known as one of the main Litho contributors to CD non-uniformity for processes using
resists with moderate or high PEB sensitivity. However, to achieve a good CD uniformity plate to plate (PtP) and within
plate (WiP) - the current temperature calibration procedures of PEB plates will not be sufficient enough to fulfil the
requirements of future technology nodes.
TEL's CD Optimizer - which is a software integrated to the Coater / Developer using a mathematical model based on
scatterometry CD data and the PEB sensitivity of the resist - allows an accurate PtP and WiP CD uniformity adjustment.
Compared to the conventional time consuming temperature calibration procedures the CD Optimizer can improve the
CD uniformity significantly - and it saves lots of productive time.
This method already has been confirmed by using bare Si wafers [1]. We will show for the first time the effect of the CD
optimization on the CD uniformity of production wafer in a high-volume 300mm DRAM FAB. We did analyse CD mass
production data obtained from Integrated Metrology (IM) scatterometry measurements before and after optimization of
the PEB plates. We can also show that it is possible to use IM mass production data for the PEB temperature
optimization directly.
In order to prepare for the next generation technology manufacturing, ASML and TEL are working together to
investigate the process performance of the LITHIUSi+/ TWINSCAN XT:1700i lithocluster through decreasing critical
dimension patterning. In this evaluation, process performance with regards to critical dimension uniformity and
defectivity are compared at different critical dimensions in order to determine areas of concentration for equipment and
process development. Specifically, design of experiments were run using immersion rinse processing at 60nm hp and
45nm hp. Defects were classified to generate a pareto for each technology node to see if there is any change in the defect
types as critical dimensions are shrinking. Similarly, critical dimension uniformity was compared through technology
nodes to see if any budget contributions have increased sensitivities to the smaller patterning features. Preliminary gauge
studies were performed for the 45nm hp evaluation, as metrology at this design rule is not yet fully proven. More work
is necessary to obtain complete understanding of metrology capabilities as this is crucial to discern precise knowledge of
processing results. While preliminary results show no adverse impact moving forward, this work is a first screening of
45nm immersion processing and more work is needed to fully characterize and optimize the process to enable robust
manufacturing at 45nm hp.
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