Dislocations are native nanowires. The realization of well-defined dislocation networks allows the electrical
characterization of only a small number of dislocations. Different types of dislocations were analyzed by integration into
the channel of MOSFETs. A substantial increase of the drain current was proved if only a few dislocations are present in
the channel of nMOSFETs. Low-temperature measurements indicate single-electron tunneling on dislocation core
defects.
A MOS-LED and a p-n LED emitting based on the dislocation-related luminescence (DRL) at 1.5 micron were already
demonstrated by the authors. Here we report recent observation of the Stark effect for the DRL in Si. Namely, a red/blue-shift
of the DRL peak positions was observed in electro- and photo-luminescence when the electric field in the pn-LED
was increased/lowered. Fitting the experimental data yields a strong characteristic coefficient of 0.0186 meV/(kV/cm)2.
This effect may allow realization of a novel Si-based emitter and modulator combined in a single device.
Spatial light modulators (SLMs) based on micromirrors for use in DUV lithography and adaptive optics require very high mirror planarity as well as mirror stability. The ideal mechanical properties of monocrystalline silicon make this material ideally suited for use in high precision optical MEMS devices. However, the integration of MEMS with CMOS poses certain restrictions on processing temperatures as well as on the compatibility of materials. The key to the successful fabrication of monocrystalline silicon micromirrors on CMOS is the silicon layer transfer process. Here, we discuss two carefully adapted wafer bonding processes that are CMOS compatible and that allow the transfer of a 300nm thick monocrystalline silicon thin film from a SOI donor wafer. One process is based on adhesive bonding using a patterned polymer layer, while the other process is based on direct bonding to a planarization layer of polished glass.
Phase separation and thermal crystallization of SiO/SiO2 superlattices result in ordered arranged silicon nanocrystals. The preparation method enables independent control of particle size as well as of particle density and spatial position by using a constant stoichiometry of the layers. Infrared absorption and photoluminescence spectra are measured as a function of annealing temperature to study the phase separation process. Three photoluminescence emission bands are observed. A band centered at 560 nm is found in as-prepared samples and vanishes for annealing above 700oC. A second band around 760 nm to 890 nm is detected for annealing temperatures above 500oC. The superlattices show a strong luminescence and a size dependent blue shift in the visible and near-infrared region after crystallization for temperatures above 900oC. The origin of the different photoluminescence bands at different phase separation stages of ultra thin SiOx layers are discussed based on transmission electron microscopy investigations and on correlations seen in photoluminescence spectra and infrared absorption. In addition, we report the PECVD preparation of amorphous SiO/SiO2 superlattices which show a similar size dependent luminescence after crystallization.
The further increase of the wafer diameter, required for high- volume production of integrated circuits, is combined with an increasing thickness of the wafers. The chip thickness, however, decreases in the same time to about 20 micrometer. Therefore techniques are necessary allowing the thinning of the whole wafer in a time and cost efficient way and with a high accuracy. The actual processing techniques and further trends for wafer thinning are summarized. The most important parameters [final surface structure (roughness), generation of subsurface defects, mechanical stresses] are discussed. Concepts of handling techniques and final processing steps of ultra-thin wafers are presented.
Further applications of MEMS require the combination of different materials in order to combine different functions in one and the same system. Besides conventional techniques (layer deposition methods) semiconductor wafer direct bonding is expected to be an effective method to produce heterogeneous materials. Different examples for optical and high-temperature applications are presented (Si-based heterostructures, Si/GaAs heterostructures).
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