Presentation + Paper
23 March 2020 Projecting EUV photo-speeds for future logic nodes
Author Affiliations +
Abstract
Since the expected exposure dose of photoresist is an important parameter in the usability of EUV at a reasonable cost, the Lithography IRDS Focus Team (IFT) developed a photospeed projection as part of the 2019 IRDS lithography roadmap. We used two different methods to do this. Both methods started with the assumption that the 7-nm node critical layers exposed using EUV single exposure just meet the CDU requirement. This is equivalent to assuming that EUV users picked the fastest resist possible that still met requirements. Method one was to separate the required CD control for the 7nm node into a portion due to photon shot noise and a portion due to resist stochastics. Although the literature has widely varying numbers for the relative amounts of photon shot noise and resist stochastics, this approach did provide some insight. If one assumes most of the CDU is mostly due to photon stochastics, then substantial resist improvements from node to node, for example 20% less stochastic CD variation, doesn’t make much difference to the total stochastics. But if there isn’t resist improvement, then even doubling the source power from node to node won’t meet CDU requirements. If we assume that resist stochastics make up almost all of the CDU observed at the 7-nm node, then no reasonable amount of dose increase meets future requirements. Only if a combination of significant resist improvement and significant dose increases is used can you meet requirements. The second approach was to extrapolate using k4.1 In this case, assuming a typical current value of k4, we estimate a typical line and space 7-nm node exposure dose to be to be 36 mJ/cm2. We used the reported historical improvement in equivalent k1 for resists as a guide for how fast resist k4 can improve. This projected that typical resist exposure doses will have to increase over 30% per node on average to meet CDU and LER requirements for the leading-edge logic devices, leading to dose requirements < 100 mJ/cm2 by the 1.5 nm node. We will discuss the challenges in meeting this roadmap and how the industry may adapt to the future challenge of lower noise imaging processes.
Conference Presentation
© (2020) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Mark Neisser and Harry J. Levinson "Projecting EUV photo-speeds for future logic nodes", Proc. SPIE 11323, Extreme Ultraviolet (EUV) Lithography XI, 113231N (23 March 2020); https://doi.org/10.1117/12.2551311
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KEYWORDS
Extreme ultraviolet

Stochastic processes

Extreme ultraviolet lithography

Logic

Lithography

Line edge roughness

Nanoimprint lithography

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