Improving the on-product overlay performance after optimization of the etch-induced contributions

Oktay Yildirim; Richard van Haren; Orion Mouraille; Ilirjan Aliaj; Jan Hermans; Christiane Jehoul

doi:10.1117/12.2675473

5 October 2023 Improving the on-product overlay performance after optimization of the etch-induced contributions

Oktay Yildirim, Richard van Haren, Orion Mouraille, Ilirjan Aliaj, Jan Hermans, Christiane Jehoul

Proceedings Volume 12802, 38th European Mask and Lithography Conference (EMLC 2023); 128020Q (2023) https://doi.org/10.1117/12.2675473
Event: 38th European Mask and Lithography Conference, 2023, Dresden, Germany

Abstract

To achieve the best on product overlay performance, process induced contributors should be understood, quantified, and addressed. Global wafer overlay penalties have been observed since the etch direction is not always perpendicular to the wafer surface especially at the wafer edge due to the etch chamber geometry and plasma parameter settings. Focus ring concept has been used to compensate etch tilt at the edge however it may be challenging to have zero tilt even with a new focus ring. Etch tool setting optimization can be a solution for accurate overlay control at the wafer edge. Going one level deeper and considering the more local etch-induced overlay penalties, we previously showed that for the inner parts of the wafer there is significant field pattern density dependent etch contribution up to 1-nm at each exposure field although the etch tool is not exposure field aware. In this experimental work, etch tool parameters such as power and pressure have been varied and two different reticles with different pattern densities are used to reveal the nature of global and die-level overlay penalties. Pressure and power settings are found to be critical for the wafer edge. The Spin-On-Glass (SOG) anti-reflection coating is shown to be the main contributor for the intra-field etch-induced overlay. We conclude with this work that etch-induced overlay is successfully mitigated at wafer edge and eliminated at intrafield thanks to the understanding on how etch process generates overlay penalties at global and at the die level.

Citation Download Citation

Oktay Yildirim, Richard van Haren, Orion Mouraille, Ilirjan Aliaj, Jan Hermans, and Christiane Jehoul "Improving the on-product overlay performance after optimization of the etch-induced contributions", Proc. SPIE 12802, 38th European Mask and Lithography Conference (EMLC 2023), 128020Q (5 October 2023); https://doi.org/10.1117/12.2675473

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KEYWORDS

Etching

Semiconducting wafers

Overlay metrology

Plasma

Chemistry

Ions

Polymers

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