500-MHz GaAs macrocell library for high-speed low-power LSI digital ASICs

Aziz I. Faris; Perry J. Robertson; Richard J. Niescier; Larry R. Tate; Andrew D. Brotman

doi:10.1117/12.21011

1 October 1990 500-MHz GaAs macrocell library for high-speed low-power LSI digital ASICs

Aziz I. Faris, Perry J. Robertson, Richard J. Niescier, Larry R. Tate, Andrew D. Brotman

Proceedings Volume 1291, Optical and Digital Gallium Arsenide Technologies for Signal Processing Applications; (1990) https://doi.org/10.1117/12.21011
Event: 1990 Technical Symposium on Optics, Electro-Optics, and Sensors, 1990, Orlando, FL, United States

Abstract

A library of custom macrocells has been designed for the implementation of high performance Gallium Arsenide (GaAs) digital integrated circuits in the AT performance and LSI functionality while minimizing power dissipation and area requirements. The entire library may be clocked up to 500 MHz with smaller cells, such as flip-flops, sustaining clock rates up to 2 GHz. The macrocells are designed around a SFL logic family which uses a 2.0 volt power supply. The cells in the library range in function from simple NOR, XOR, clock drivers and I/O buffers to higher function macrocells, such as, Booth multipliers, barrel shifters, ALU, adders, flip-flops and 4-bit up/down counters. Output buffers are designed to drive 50 ohm transmission lines with a 1.0 volt logic swing. An unloaded buffered 3-input NOR gate cell exhibits an average propagation delay of 115 ps per gate while dissipating only 1.5 mW of power for a speed-power product of 173 fJ. The unloaded delays are derated by 0.3 ps/fF load capacitance and 2 ps per fanout. The macrocells were designed for the AT enhancement/depletion mode process which has 1.0 micron gates and 2.0 micron design rules. This library has been used in circuits to provide a functional density of over 15,000 equivalent gates/sq cm. Current designs using this macrocell library include an 8x8 multiplier and a 16 tap transversal filter chip.

Citation Download Citation

Aziz I. Faris, Perry J. Robertson, Richard J. Niescier, Larry R. Tate, and Andrew D. Brotman "500-MHz GaAs macrocell library for high-speed low-power LSI digital ASICs", Proc. SPIE 1291, Optical and Digital Gallium Arsenide Technologies for Signal Processing Applications, (1 October 1990); https://doi.org/10.1117/12.21011

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