Data prep: the bottleneck of future applications?

Juergen Gramss; Hans Eichhorn; Melchior Lempke; Renate Jaritz; Volker Neick; Dirk Beyer; Bertram Buerger; Ulrich Baetz; Klaus Kunze; Nikola Belic

doi:10.1117/12.692638

21 June 2006 Data prep: the bottleneck of future applications?

Juergen Gramss, Hans Eichhorn, Melchior Lempke, Renate Jaritz, Volker Neick, Dirk Beyer, Bertram Buerger, Ulrich Baetz, Klaus Kunze, Nikola Belic

Author Affiliations +

Proceedings Volume 6281, 22nd European Mask and Lithography Conference; 62810G (2006) https://doi.org/10.1117/12.692638
Event: 22nd European Mask and Lithography Conference, 2006, Dresden, Germany

Abstract

There is no doubt that shaped beam systems have been well established in the mask write community since the introduction of the 130nm technology node. Moreover, they are successfully advancing to conquer also the wafer direct write market. To be able to handle today and in the near future the tremendous data volumes with their characteristic complexity as well as to make use of such indispensable methods like PEC and Fogging corrections, new, sophisticated solutions are necessary to master the challenging 45nm technology node. However, we are aware that the 45nm node presents only an intermediate step, because, according to the international roadmap, we soon will be confronted with the hardware and software requirements of the next, the 32nm technology node. In this context it becomes more and more important to consider potential showstoppers, in our case the data preparation process To investigate this complex subject a Linux cluster computer featuring 3.6GHz clock rate CPUs, and a software package supporting distributed computing with a 64Bit version and address units down to 0.1nm were used. The work was focused on the performance of pattern samples down to the 45nm node. Both mask and wafer data as well as NIL template manufacturing were considered, data prep times and CPU loads were analysed. Furthermore, the user-friendly Leica Interface for Data Preparations (LINDA) was applied. In addition, an outlook to future hardware/software configurations for mastering the challenges of the 32nm node will be given. The results presented in this paper prove that data preparation is not the bottleneck of current and future applications.

Citation Download Citation

Juergen Gramss, Hans Eichhorn, Melchior Lempke, Renate Jaritz, Volker Neick, Dirk Beyer, Bertram Buerger, Ulrich Baetz, Klaus Kunze, and Nikola Belic "Data prep: the bottleneck of future applications?", Proc. SPIE 6281, 22nd European Mask and Lithography Conference, 62810G (21 June 2006); https://doi.org/10.1117/12.692638

ACCESS THE FULL ARTICLE

INSTITUTIONAL
Select your institution to access the SPIE Digital Library.

SELECT YOUR INSTITUTION

PERSONAL
Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.

PERSONAL SIGN IN

No SPIE Account? Create one

PURCHASE THIS CONTENT

SUBSCRIBE TO DIGITAL LIBRARY

50 downloads per 1-year subscription

Members: $195

Non-members: $335 ADD TO CART

25 downloads per 1 - year subscription

Members: $145

Non-members: $250 ADD TO CART

PURCHASE SINGLE ARTICLE

Includes PDF, HTML & Video, when available

Members: $17.00

Non-members: $21.00 ADD TO CART

PROCEEDINGS
12 PAGES

DOWNLOAD PAPER SAVE TO MY LIBRARY

GET CITATION

RIGHTS & PERMISSIONS

Get copyright permission Get copyright permission on Copyright Marketplace

KEYWORDS

Data processing

Magnesium

Photomasks

Nanoimprint lithography

Semiconducting wafers

Lithography

Beam shaping

Show All Keywords

Keywords/Phrases

Search In:

Publication Years