Mr. Charles Pieczulewski Profile

Charles Pieczulewski

Strategy Executive (Director)

SPIE Involvement:

Author

Area of Expertise:

Photolithography equipment & process (exposure, track)

Websites:

Company Website

Profile Summary

SCREEN SEMICONDUCTOR SOLUTIONS CO., LTD.
APRIL 2005 – Present (14 YEARS) Kyoto, JAPAN
* 2020/4 - Present: Strategy Executive (Director)
* 2018/4 - 2020/3: Deputy Sr. GM, Global Sales Ops.
* 2016/4 - 2019/3: Deputy Sr. GM, Track System Ops.
* 2016/4 - 2019/3: GM, Lithography Development Div.
* 2016/4 - 2018/3: Deputy GM, CTO Office
* 2013/4 - 2016/3: Deputy Sr. GM, Business Ops.
* 2006/7 - 2014/9: GM, Marketing Div., SOKUDO

SCREEN SPE USA, LLC
JANUARY 2000 – Present (20 YEARS) Sunnyvale, CA USA
* Vice President (since April 2016) dual assignment with SCREEN, Japan HQ role above.
* Sr. Product Engineer (2000/1 - 2005/3) Photolithography coat/develop track

CANON, INC.
APRIL 1995 – DEC. 1999 (5 YEARS) Utsunomiya, JAPAN
Support roles in manufacturing quality assurance, product marketing, lithography roadmap planning, and sales.

EDUCATION

MASSACHUSETTS INSTITUTE OF TECHNOLOGY (MIT)
Dual Masters Degrees (1995)
S.M. Materials Science & Engineering,
S.M. Technology & Policy

NORTHWESTERN UNIVERSITY
B.S. Materials Science & Engineering (1992)

Publications (20)

Proceedings Article | 4 June 2019 Paper

Paper

Litho-performance expansion with new SOC made from Hemicellulose

Masahiko Harumoto, Yuji Tanaka, Chisayo Nakayama, You Arisawa, Masaya Asai, Charles Pieczulewski, Harold Stokes, Kimiko Yamamoto, Hiroki Tanaka, Yasuaki Tanaka, Kazuyo Morita

Proceedings Volume 10957, 109571V (2019) https://doi.org/10.1117/12.2517692

KEYWORDS: System on a chip, Silicon, Etching, Photoresist materials, Extreme ultraviolet, Extreme ultraviolet lithography, Line width roughness, Photoresist developing, Scanning electron microscopy, Antireflective coatings

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Proceedings Article | 25 March 2019 Paper

Paper

Improved hemicellulose spin on carbon hardmask

Kazuyo Morita, Kimiko Yamamoto, Hiroki Tanaka, Yasuaki Tanaka, Masahiko Harumoto, Yuji Tanaka, Chisayo Nakayama, You Arisawa, Tomohiro Motono, Harold Stokes, Masaya Asai, Charles Pieczulewski

Proceedings Volume 10960, 109601A (2019) https://doi.org/10.1117/12.2514915

KEYWORDS: System on a chip, Reactive ion etching, Image processing, Extreme ultraviolet, Carbon, Scanning electron microscopy, Optical lithography, Etching, Semiconducting wafers, Logic devices

Read Abstract +

Proceedings Article | 13 March 2018 Presentation + Paper

Presentation + Paper

LWR enhancement for 300mm track processing

Harold Stokes, Jelle Vandereyken, Waut Drent, Masahiko Harumoto, Masaya Asai, Yuji Tanaka, Chisayo Nakayama, Charles Pieczulewski

Proceedings Volume 10586, 105860J (2018) https://doi.org/10.1117/12.2297471

KEYWORDS: Annealing, Line width roughness, Semiconducting wafers, Line edge roughness, Ultraviolet radiation, Etching, Optical lithography, Lithography, Photoresist materials, Reticles

Read Abstract +

Proceedings Article | 27 March 2017 Paper

Paper

DSA process window expansion with novel DSA track hardware

Masahiko Harumoto, Harold Stokes, Yuji Tanaka, Koji Kaneyama, Chalres Pieczulewski, Masaya Asai, Maxime Argoud, Isabelle Servin, Gaëlle Chamiot-Maitral, Guillaume Claveau, Raluca Tiron, Ian Cayrefourcq

Proceedings Volume 10146, 101461X (2017) https://doi.org/10.1117/12.2257945

KEYWORDS: Directed self assembly, Optical lithography, Thin film coatings, Line width roughness, Annealing, Oxygen, Scanning electron microscopy, Atmospheric modeling, Semiconducting wafers, Polymers

Read Abstract +

Proceedings Article | 27 March 2017 Paper

Paper

EUV process improvement with novel litho track hardware

Harold Stokes, Masahiko Harumoto, Yuji Tanaka, Koji Kaneyama, Charles Pieczulewski, Masaya Asai

Proceedings Volume 10143, 101431Z (2017) https://doi.org/10.1117/12.2259994

KEYWORDS: Annealing, Extreme ultraviolet, Line width roughness, Semiconducting wafers, Standards development, Extreme ultraviolet lithography, Lithography, Thin film coatings, Wafer testing, Metrology

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Proceedings Article | 1 April 2016 Paper

Paper

Investigation of coat-develop track system for placement error of contact hole shrink process

Masahiko Harumoto, Harold Stokes, Yuji Tanaka, Koji Kaneyama, Charles Pieczulewski, Masaya Asai, Isabelle Servin, Maxime Argoud, Ahmed Gharbi, Celine Lapeyre, Raluca Tiron, Cedric Monget

Proceedings Volume 9777, 97770O (2016) https://doi.org/10.1117/12.2219925

KEYWORDS: Lithography, Semiconducting wafers, Directed self assembly, Image processing, Scanning electron microscopy, Etching, Immersion lithography, Optical lithography, Annealing, Distance measurement

Read Abstract +

Proceedings Article | 18 March 2016 Paper

Paper

LWR and defectivity improvement on EUV track system

Masahiko Harumoto, Harold Stokes, Yan Thouroude, Koji Kaneyama, Charles Pieczulewski, Masaya Asai

Proceedings Volume 9776, 977628 (2016) https://doi.org/10.1117/12.2218947

KEYWORDS: Line width roughness, Extreme ultraviolet lithography, Extreme ultraviolet, Thin film coatings, Photoresist processing, Bridges, Semiconducting wafers, Wafer-level optics, Scanning electron microscopy

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Proceedings Article | 20 March 2015 Paper

Paper

Fundamental study of spin-coating using in-situ analysis and simulation

Masahiko Harumoto, Jun-ichi Yoshida, Harold Stokes, Yuji Tanaka, Tadashi Miyagi, Koji Kaneyama, Charles Pieczulewski, Masaya Asai

Proceedings Volume 9425, 94250G (2015) https://doi.org/10.1117/12.2085277

KEYWORDS: Semiconducting wafers, Coating, High speed cameras, Extreme ultraviolet, Photoresist materials, Photoresist processing, Video, Silicon, Content addressable memory, Lithium

Read Abstract +

Proceedings Article | 19 March 2015 Paper

Paper

Improving process and system for EUV coat-develop track

Masahiko Harumoto, Harold Stokes, Yan Thouroude, Tadashi Miyagi, Koji Kaneyama, Charles Pieczulewski, Masaya Asai

Proceedings Volume 9422, 94222C (2015) https://doi.org/10.1117/12.2085275

KEYWORDS: Line width roughness, Photoresist processing, Extreme ultraviolet, Extreme ultraviolet lithography, Photoresist developing, Semiconducting wafers, Image processing, Bridges, Scanning electron microscopy, Wafer-level optics

Read Abstract +

Proceedings Article | 17 April 2014 Paper

Paper

EUV resist dissolution optimization for CD uniformity and defect control in coat develop track process

Masahiko Harumoto, Harold Stokes, Yan Thouroude, Osamu Tamada, Tadashi Miyagi, Koji Kaneyama, Charles Pieczulewski, Masaya Asai

Proceedings Volume 9048, 904829 (2014) https://doi.org/10.1117/12.2046168

KEYWORDS: Semiconducting wafers, Extreme ultraviolet, Photoresist processing, Thin film coatings, Scanning electron microscopy, Extreme ultraviolet lithography, Coating, Line width roughness, Lithography, Metrology

Read Abstract +

Proceedings Article | 2 April 2014 Paper

Paper

Handling, clamping, and alignment evaluation for multi-beam technology on Matrix1.1 platform

Ludovic Lattard, Jonathan Pradelles, Niels Vergeer, Erwin Slot, Laurent Pain, Erik de Jong, Gianpaolo Torriani, Charles Pieczulewski

Proceedings Volume 9050, 90502E (2014) https://doi.org/10.1117/12.2046233

KEYWORDS: Semiconducting wafers, Optical alignment, Lithography, Sensors, Cooling systems, Electron beam lithography, Interferometers, Manufacturing, Electron beams, Interfaces

Read Abstract +

Proceedings Article | 28 March 2014 Paper

Paper

300mm pilot line DSA contact hole process stability

M. Argoud, I. Servin, A. Gharbi, P. Pimenta Barros, K. Jullian, M. Sanche, G. Chamiot-Maitral, S. Barnola, R. Tiron, C. Navarro, X. Chevalier, C. Nicolet, G. Fleury, G. Hadziioannou, M. Asai, C. Pieczulewski

Proceedings Volume 9049, 904929 (2014) https://doi.org/10.1117/12.2046315

KEYWORDS: Polymethylmethacrylate, Etching, Lithography, Critical dimension metrology, Semiconductors, Electron beam lithography, Semiconducting wafers, Silicon, High volume manufacturing, Directed self assembly

Read Abstract +

Proceedings Article | 27 March 2014 Paper

Paper

In-situ analysis of defect formation in coat develop track process

Masahiko Harumoto, Harold Stokes, Osamu Tamada, Tadashi Miyagi, Koji Kaneyama, Charles Pieczulewski, Masaya Asai

Proceedings Volume 9051, 90510P (2014) https://doi.org/10.1117/12.2045876

KEYWORDS: Coating, Cameras, Extreme ultraviolet, Image processing, High speed cameras, Video, Semiconducting wafers, Thin film coatings, Scanning electron microscopy, Content addressable memory

Read Abstract +

Proceedings Article | 1 April 2013 Paper

Paper

Investigation of coat-develop track system for EUV resist processing

Masahiko Harumoto, Osamu Tamada, Tadashi Miyagi, Koji Kaneyama, Akihiko Morita, Charles Pieczulewski, Masaya Asai

Proceedings Volume 8679, 86792W (2013) https://doi.org/10.1117/12.2011354

KEYWORDS: Semiconducting wafers, Line width roughness, Extreme ultraviolet, Extreme ultraviolet lithography, Bridges, Photoresist processing, Scanning electron microscopy, Coating, Thin film coatings, Defect detection

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Proceedings Article | 26 March 2013 Paper

Paper

The potential of block copolymer’s directed self-assembly for contact hole shrink and contact multiplication

R. Tiron, A. Gharbi, M. Argoud, X. Chevalier, J. Belledent, P. Pimmenta Barros, I. Servin, C. Navarro, G. Cunge, S. Barnola, L. Pain, M. Asai, C. Pieczulewski

Proceedings Volume 8680, 868012 (2013) https://doi.org/10.1117/12.2011477

KEYWORDS: Etching, Polymethylmethacrylate, Picosecond phenomena, Lithography, Polymers, 193nm lithography, Critical dimension metrology, Oxygen, Neodymium, Directed self assembly

Read Abstract +

Proceedings Article | 23 March 2012 Paper

Paper

Coat-develop track process for inorganic EUV resist

Masahiko Harumoto, Tadashi Miyagi, Koji Kaneyama, Akihiko Morita, Charles Pieczulewski, Masaya Asai, Benjamin Clark

Proceedings Volume 8322, 83222C (2012) https://doi.org/10.1117/12.916122

KEYWORDS: Extreme ultraviolet, Polymers, Photoresist processing, Semiconducting wafers, Photoresist materials, Coating, Thin film coatings, Lithography, Extreme ultraviolet lithography, Polymer thin films

Read Abstract +

Proceedings Article | 19 March 2012 Paper

Paper

Accelerated purge drying to prevent pattern collapse without surfactant rinse for high-aspect ratio resist patterns

Tomohiro Goto, Charles Pieczulewski, Akihiko Morita

Proceedings Volume 8325, 83250S (2012) https://doi.org/10.1117/12.916322

KEYWORDS: Semiconducting wafers, Standards development, Photoresist processing, Critical dimension metrology, Capillaries, Lithography, Finite element methods, Optical lithography, Yield improvement, Scanners

Read Abstract +

Proceedings Article | 4 April 2011 Paper

Paper

IMAGINE: an open consortium to boost maskless lithography take off: first assessment results on MAPPER technology

L. Pain, B. Icard, M. Martin, C. Constancias, S. Tedesco, P. Wiedeman, A. Farah, B. Kampherbeek, C. Pieczulewski, H. Kandrashov

Proceedings Volume 7970, 79700Y (2011) https://doi.org/10.1117/12.881286

KEYWORDS: Lithography, Photoresist processing, Semiconducting wafers, Maskless lithography, Manufacturing, Reliability, Silicon, Electrons, Projection systems, High volume manufacturing

Read Abstract +

Proceedings Article | 11 December 2009 Paper

Paper

Litho-freeze-litho-etch (LFLE) enabling dual wafer flow coat/develop process and freeze CD tuning bake for >200wph immersion ArF photolithography double patterning

Charles Pieczulewski, Craig Rosslee

Proceedings Volume 7520, 75201H (2009) https://doi.org/10.1117/12.837221

KEYWORDS: Semiconducting wafers, Double patterning technology, Thin film coatings, Optical lithography, Critical dimension metrology, Temperature metrology, Lithography, Scanners, Photoresist processing, Wafer manufacturing

Read Abstract +

Proceedings Article | 24 July 2002 Paper

Paper

Optimizing CD uniformity by total PEB cycle temperature control on track equipment

Akihiro Hisai, Koji Kaneyama, Charles Pieczulewski

Proceedings Volume 4690, (2002) https://doi.org/10.1117/12.474276

KEYWORDS: Semiconducting wafers, Critical dimension metrology, Temperature metrology, Photoresist materials, Optical lithography, Photoresist processing, Silicon, Thermal modeling, Liquids, Electronics

Read Abstract +

Showing 5 of 20 publications

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