Mr. David Guerrero Profile

David Guerrero

at Univ de Sevilla

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Publications (2)

Proceedings Article | 10 May 2007 Paper

Automatic logic synthesis for parallel alternating latches clocking schemes

D. Guerrero, M. Bellido, J. Juan, A. Millan, P. Ruiz, E. Ostua, J. Viejo

Proceedings Volume 6590, 659006 (2007) https://doi.org/10.1117/12.723664

KEYWORDS: Clocks, Logic, Signal processing, Computer aided design, Switches, Digital electronics, Tolerancing, Very large scale integration, Standards development, Control systems

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Proceedings Article | 30 June 2005 Paper

Algorithms to get the maximum operation frequency for skew-tolerant clocking schemes

D. Guerrero, M. Bellido, J. Juan, A. Millan, P. Ruiz, E. Ostua, J. Viejo

Proceedings Volume 5837, (2005) https://doi.org/10.1117/12.608064

KEYWORDS: Logic, Clocks, Algorithm development, Very large scale integration, Multiplexers

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