The charge pump CMOS circuit designs are presented for bio-medical applications wherein the clock voltage is boosted internally. Four and six-stage charge pumps are implemented in 1.5 μm n-well CMOS process. The charge pump circuits can be operated in 1.2 V - 3 V power supply voltage range. Outputs of 12.5 V and 17.8 V are measured from four and six-stage charge pumps, respectively with a 3 V power supply. The charge pump circuits can also be used to generate clock voltage higher than the input clock voltage. In the present design, the clock voltages, 8 V and 11 V have been generated from four-stage and six-stage charge pumps, respectively which are nearly 2.5 and 4 times the input clock voltage of 3 V. The technique of boosting the clock internally has been applied in implementation of a bio-implantable battery powered electrical stimulation chip.
In this work, a remote power delivery system to charge rechargeable batteries that power a Bio-implanted Electrical Stimulation System (BESS) is first described. A loosely coupled inductive transmitter and receiver system has been used to power a bio-implanted gastric pacer. The receiver coil, rechargeable batteries, battery charging chip and the chip containing stimulation circuitry form a hybrid integrated microsystem. A design methodology for this Remote Power Delivery System (RPDS) is proposed. The BESS chip is also designed for electrical stimulation. It is a special IC chip which takes power from the rechargeable batteries and provides output pulses of 9.9 V amplitude at a frequency of 103 Hz and a duty cycle of 5%. The BESS chip contains a battery switching circuit and a pulse conditioning circuit which first provides pulses of 3 V amplitude. It also has an internal charge pump and a pulse booster circuit to boost the pulse amplitude to 9.9 V. Hybrid packaging is considered for integrating the implantable electrical stimulation circuitry and the remote power delivery system. Screen printed interconnects are used to integrate the BESS chip, the battery charging chip, discrete components and the receiver circuit of the RPDS.
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