Paper
10 April 2013 Implementation of hybrid metrology at HVM fab for 20nm and beyond
Alok Vaid, Lokesh Subramany, Givantha Iddawela, Carl Ford, John Allgair, Gaurav Agrawal, John Taylor, Carsten Hartig, Byung Cheol (Charles) Kang, Cornel Bozdog, Matthew Sendelbach, Paul Isbester, Limor Issascharoff
Author Affiliations +
Abstract
Metrology tools are increasingly challenged by the continuing decrease in the device dimensions, combined with complex disruptive materials and architectures. These demands are not being met appropriately by existing/forthcoming metrology techniques individually. Hybrid Metrology (HM) – the practice to combine measurements from multiple toolset types in order to enable or improve the measurement of one or more critical parameters – is being incorporated by the industry to resolve these challenges. Continuing our previous work we now take the HM from the lab into the fab. This paper presents the first-in-industry implementation of HM within a High Volume Manufacturing (HVM) environment. Advanced 3D applications are the first to use HM: 20nm Contact etch and 14nm FinFET poly etch. The concept and main components of this Phase-1 Host-based implementation are discussed. We show examples of communication protocols/standards that have been specially constructed for HM for sharing data between the metrology tools and fab host in GLOBALFOUNDRIES, as well as the HM recipe setup and HVM results. Finally we discuss our vision and phased progression/roadmap for Phase-2 HM implementation to fully reap the benefits of hybridization.
© (2013) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Alok Vaid, Lokesh Subramany, Givantha Iddawela, Carl Ford, John Allgair, Gaurav Agrawal, John Taylor, Carsten Hartig, Byung Cheol (Charles) Kang, Cornel Bozdog, Matthew Sendelbach, Paul Isbester, and Limor Issascharoff "Implementation of hybrid metrology at HVM fab for 20nm and beyond", Proc. SPIE 8681, Metrology, Inspection, and Process Control for Microlithography XXVII, 868103 (10 April 2013); https://doi.org/10.1117/12.2012339
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Cited by 7 scholarly publications.
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KEYWORDS
Metrology

Semiconducting wafers

Critical dimension metrology

Transmission electron microscopy

Etching

Process control

Data modeling

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