Mr. Jinhyuck Jun Profile

Jinhyuck Jun

at SK Hynix Inc

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Author

Publications (10)

Proceedings Article | 4 April 2017 Presentation + Paper

Cost effective solution using inverse lithography OPC for DRAM random contact layer

Jinhyuck Jun, Jaehee Hwang, Jaeseung Choi, Seyoung Oh, Chanha Park, Hyunjo Yang, Thuc Dam, Munhoe Do, Dong Chan Lee, Guangming Xiao, Jung-Hoe Choi, Kevin Lucas

Proceedings Volume 10148, 1014809 (2017) https://doi.org/10.1117/12.2257857

KEYWORDS: Lithography, Optical proximity correction, Optical lithography, Manufacturing, Photomasks, Semiconducting wafers, Atrial fibrillation, Source mask optimization, Image processing

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Proceedings Article | 24 March 2016 Paper

OPC optimization techniques for enabling the reduction of mismatch between overlay metrology and the device pattern cell

Shinyoung Kim, Chanha Park, Jinhyuck Jun, Jaehee Hwang, Hyunjo Yang, Nang-Lyeom Oh, Sean Park, Chris Park, Kyu-Tae Sun, Youping Zhang, Paul Tuffy

Proceedings Volume 9778, 97781S (2016) https://doi.org/10.1117/12.2219467

KEYWORDS: Overlay metrology, Optical proximity correction, Diffraction, Critical dimension metrology, Metrology, Scanning electron microscopy, Electron microscopes, Optical lithography, Error analysis, Target detection

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Proceedings Article | 18 March 2015 Paper

Layout optimization with assist features placement by model based rule tables for 2x node random contact

Jinhyuck Jun, Minwoo Park, Chanha Park, Hyunjo Yang, Donggyu Yim, Munhoe Do, Dongchan Lee, Taehoon Kim, Junghoe Choi, Gerard Luk-Pat, Alex Miloslavsky

Proceedings Volume 9427, 94270D (2015) https://doi.org/10.1117/12.2085460

KEYWORDS: Atrial fibrillation, Semiconducting wafers, Photomasks, Critical dimension metrology, Optical proximity correction, Nanoimprint lithography, Lithography, Printing, SRAF, Manufacturing

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As the industry pushes to ever more complex illumination schemes to increase resolution for next generation memory and logic circuits, sub-resolution assist feature (SRAF) placement requirements become increasingly severe. Therefore device manufacturers are evaluating improvements in SRAF placement algorithms which do not sacrifice main feature (MF) patterning capability. There are known-well several methods to generate SRAF such as Rule based Assist Features (RBAF), Model Based Assist Features (MBAF) and Hybrid Assisted Features combining features of the different algorithms using both RBAF and MBAF. Rule Based Assist Features (RBAF) continue to be deployed, even with the availability of Model Based Assist Features (MBAF) and Inverse Lithography Technology (ILT). Certainly for the 3x nm node, and even at the 2x nm nodes and lower, RBAF is used because it demands less run time and provides better consistency. Since RBAF is needed now and in the future, what is also needed is a faster method to create the AF rule tables. The current method typically involves making masks and printing wafers that contain several experiments, varying the main feature configurations, AF configurations, dose conditions, and defocus conditions – this is a time consuming and expensive process. In addition, as the technology node shrinks, wafer process changes and source shape redesigns occur more frequently, escalating the cost of rule table creation. Furthermore, as the demand on process margin escalates, there is a greater need for multiple rule tables: each tailored to a specific set of main-feature configurations. Model Assisted Rule Tables(MART) creates a set of test patterns, and evaluates the simulated CD at nominal conditions, defocused conditions and off-dose conditions. It also uses lithographic simulation to evaluate the likelihood of AF printing. It then analyzes the simulation data to automatically create AF rule tables. It means that analysis results display the cost of different AF configurations as the space grows between a pair of main features. In summary, model based rule tables method is able to make it much easier to create rule tables, leading to faster rule-table creation and a lower barrier to the creation of more rule tables.

Proceedings Article | 28 March 2014 Paper

Layout optimization of DRAM cells using rigorous simulation model for NTD

Jinhyuck Jeon, Shinyoung Kim, Chanha Park, Hyunjo Yang, Donggyu Yim, Bernd Kuechler, Rainer Zimmermann, Thomas Muelders, Ulrich Klostermann, Thomas Schmoeller, Mun-hoe Do, Jung-Hoe Choi

Proceedings Volume 9053, 90530J (2014) https://doi.org/10.1117/12.2046541

KEYWORDS: Photomasks, Optical proximity correction, SRAF, Printing, Semiconducting wafers, 3D modeling, Calibration, Optimization (mathematics), Source mask optimization, Manufacturing

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DRAM chip space is mainly determined by the size of the memory cell array patterns which consist of periodic memory cell features and edges of the periodic array. Resolution Enhancement Techniques (RET) are used to optimize the periodic pattern process performance. Computational Lithography such as source mask optimization (SMO) to find the optimal off axis illumination and optical proximity correction (OPC) combined with model based SRAF placement are applied to print patterns on target. For 20nm Memory Cell optimization we see challenges that demand additional tool competence for layout optimization. The first challenge is a memory core pattern of brick-wall type with a k1 of 0.28, so it allows only two spectral beams to interfere. We will show how to analytically derive the only valid geometrically limited source. Another consequence of two-beam interference limitation is a ”super stable” core pattern, with the advantage of high depth of focus (DoF) but also low sensitivity to proximity corrections or changes of contact aspect ratio. This makes an array edge correction very difficult. The edge can be the most critical pattern since it forms the transition from the very stable regime of periodic patterns to non-periodic periphery, so it combines the most critical pitch and highest susceptibility to defocus. Above challenge makes the layout correction to a complex optimization task demanding a layout optimization that finds a solution with optimal process stability taking into account DoF, exposure dose latitude (EL), mask error enhancement factor (MEEF) and mask manufacturability constraints. This can only be achieved by simultaneously considering all criteria while placing and sizing SRAFs and main mask features. The second challenge is the use of a negative tone development (NTD) type resist, which has a strong resist effect and is difficult to characterize experimentally due to negative resist profile taper angles that perturb CD at bottom characterization by scanning electron microscope (SEM) measurements. High resist impact and difficult model data acquisition demand for a simulation model that hat is capable of extrapolating reliably beyond its calibration dataset. We use rigorous simulation models to provide that predictive performance. We have discussed the need of a rigorous mask optimization process for DRAM contact cell layout yielding mask layouts that are optimal in process performance, mask manufacturability and accuracy. In this paper, we have shown the step by step process from analytical illumination source derivation, a NTD and application tailored model calibration to layout optimization such as OPC and SRAF placement. Finally the work has been verified with simulation and experimental results on wafer.

Proceedings Article | 1 October 2013 Paper

Model-driven target optimization to resolve design hotspots through image quality enhancement

Sung-Woo Lee, Tom Cecil, Guangming Xiao, Mindy Lee, Jung-Hoe Choi, Seung-Hee Baek, Jin-Hyuck Jeon, Chan Ha Park, Dave Kim, Kevin Lucas

Proceedings Volume 8880, 88801U (2013) https://doi.org/10.1117/12.2026140

KEYWORDS: Optical proximity correction, Image quality, Optimization (mathematics), Nanoimprint lithography, Image enhancement, Image processing, Design for manufacturing, Resolution enhancement technologies, Neodymium, Nano opto mechanical systems

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Proceedings Article | 29 March 2013 Paper

Process window analysis of algorithmic assist feature placement options at the 2X nm node DRAM

Jinhyuck Jeon, Shinyoung Kim, Jookyoung Song, Chanha Park, Hyunjo Yang, Donggyu Yim, Brian Ward, Yunqiang Zhang, Kevin Hooker, Munhoe Do, Jung-Hoe Choi, Stephen Jang

Proceedings Volume 8684, 86840H (2013) https://doi.org/10.1117/12.2011450

KEYWORDS: SRAF, Atrial fibrillation, Critical dimension metrology, Optical proximity correction, Semiconducting wafers, Photomasks, Model-based design, Manufacturing, Printing, Inspection

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As the industry pushes to ever more complex illumination schemes to increase resolution for next generation memory and logic circuits; subresolution assist feature (SRAF) placement requirements become increasingly severe. Therefore device manufacturers are evaluating improvements in SRAF placement algorithms which do not sacrifice main feature (MF) patterning capability. AF placement algorithms can be categorized broadly as either rule-based (RB), model-based (MB). However, combining these different algorithms into new integrated solutions may enable a more optimal overall solution. RBAF is the baseline AF placement method for many previous technology nodes. Although RBAF algorithm complexity limits its use with very extreme illumination, RBAF is still a powerful option in certain scenarios. One example is for repeating patterns in memory arrays. RBAF algorithms can be finely optimized and verified experimentally without the building of complex models. RBAF also guarantees AF placement consistency based only on the very local geometric environment, which is important in applications where consistent signal propagation is of critical importance. MBAF algorithms deliver the ability to reliably place assist features for enhanced process window control across a wide variety of layout feature configurations and aggressive illumination sources. These methods optimize sophisticated AF placement to improve main feature PW but without performing full main feature OPC. The flexibility of MBAF allows for efficient investigations of future technology nodes as the number of interactions between local layout features increases beyond what RBAF algorithms can effectively support Based on hybrid approach algorithms combining features of the different algorithms using both RBAF and MBAF methods, the generation and placement of SRAF can be a good alternative. Combining of two kinds of SRAF placement options might result in relatively improved process window compared to an independent approach since two methods are capable of supplement each other with a complementary advantages. In this paper we evaluate the impact of SRAF configuration to pattern profile as well as CD margin window and manufacturing applications of MBAF and Hybrid approach algorithms compared to the current OPC without AF. As a conclusion, we suggest methodology to set up optimum SRAF configuration using these AF methods with regard to process window.

Proceedings Article | 10 March 2010 Paper

The impacts of scanner modeling parameters for OPC model of sub-40nm memory device

Cheol-Kyun Kim, Jong-won Jang, Jinhyuck Jeon, Chan-ha Park, Hyun-jo Yang, Donggyu Yim, Sungki Park

Proceedings Volume 7640, 764013 (2010) https://doi.org/10.1117/12.846710

KEYWORDS: Scanners, Critical dimension metrology, Optical proximity correction, Instrument modeling, Lithographic illumination, Shape analysis, Process modeling, Semiconducting wafers, Resolution enhancement technologies, Lithography

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It is necessary to apply extreme illumination condition on real device as minimum feature size of the device shrinks. As k1 decrease, ultra extreme illumination has to be used. However, in case of using this illumination, CD and process windows dramatically fluctuate as pupil shapes slightly changes. For past several years, Pupil Fit Modeling (PFM) was developed in order to analyze pupil shape parameters which are independent from each others. The first object in this work is to distinguish pupil shape of different scanner by separating more parameters. According to pupil parameter analysis, the major factors of CD or process window difference between two scanner systems obviously appear. Due to correlation between pupil parameter and scanner knob, pupil parameter analysis would be clearly identified which scanner knob should be compensated. The second object is to define specification of each parameter by using analysis of CD budget for each pupil parameters. Using periodic monitoring of pupil parameter which is controlled by previous specification, scanner system in product lines can be maintained at ideal state. Additionally, OPC model accuracy enhancement should be obtained by using highly accurate fitted pupil model. Recently, other application of pupil model is reported for improvement of OPC and model based verification model accuracy. Such as modeling using average optics and hot spot detection of scanner specific model are easily adopted by using pupil fit model. Therefore, applications of pupil fit parameter for process model are very useful for improvement of model accuracy. In our study, the quantity of model accuracy enhancement using PFM is investigated and analyzed. OPC and hotspot point detection capability results with pupil fit model would be shown. Also, in this paper, trends of CD and process window for each scanner parameter are evaluated by using pupil fit model. As of results, we were able to find which pupil parameter has influence in critical layer CD and application of this result resulted in better accuracy in detecting hotspot for model based verification.

Proceedings Article | 4 March 2010 Paper

Analysis of the impact of pupil shape variation by pupil fit modeling

Jin-hyuck Jeon, Chan-ha Park, Hyun-jo Yang, Cheol-kyun Kim, Jin-young Choi, Sang-jin Oh, Dong-gyu Yim, Sung-ki Park, Ki-yeop Park, Young-hong Min, Andre Engelen, Bart Smeets, Joerg Zimmermann

Proceedings Volume 7640, 76400Y (2010) https://doi.org/10.1117/12.846703

KEYWORDS: Scanners, Critical dimension metrology, Shape analysis, Optical proximity correction, Fiber optic illuminators, Semiconducting wafers, Lithography, Control systems, Instrument modeling, Process control

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As K1 factor for mass-production of memory devices has been decreased to almost its theoretical limit, the process window of lithography is getting much smaller and the production yield has become more sensitive to even small variations of the process in lithography. So it is necessary to control the process variations more tightly than ever. In mass-production, it is very hard to extend the production capacity if the tool-to-tool variation of scanners and/or scanner stability through time is not minimized. One of the most critical sources of variation is the illumination pupil. So it is critical to qualify the shape of pupils in scanners to control tool-to-tool variations. Traditionally, the pupil shape has been analyzed by using classical pupil parameters to define pupil shape, but these basic parameters, sometimes, cannot distinguish the tool-to-tool variations. It has been found that the pupil shape can be changed by illumination misalignment or damages in optics and theses changes can have a great effect on critical dimension (CD), pattern profile or OPC accuracy. These imaging effects are not captured by the basic pupil parameters. The correlation between CD and pupil parameters will become even more difficult with the introduction of more complex (freeform) illumination pupils. In this paper, illumination pupils were analyzed using a more sophisticated parametric pupil description (Pupil Fit Model, PFM). And the impact of pupil shape variations on CD for critical features is investigated. The tool-to-tool mismatching in gate layer of 4X memory device was demonstrated for an example. Also, we interpreted which parameter is most sensitive to CD for different applications. It was found that the more sophisticated parametric pupil description is much better compared to the traditional way of pupil control. However, our examples also show that the tool-to-tool pupil variation and pupil variation through time of a scanner can not be adequately monitored by pupil parameters only, The best pupil control strategy is a combination of pupil parameters and simulated CD using measured illumination pupils or modeled pupils.

Proceedings Article | 14 December 2009 Paper

Study of OPC accuracy by illumination source types

Kiho Yang, Daejin Park, Jeonkyu Lee, Sangjin Oh, Jinhyuck Jeon, Taejun You, Chanha Park, Donggyu Yim, Sungki Park

Proceedings Volume 7520, 75202A (2009) https://doi.org/10.1117/12.837224

KEYWORDS: Optical proximity correction, Data modeling, Calibration, Lithography, Transistors, Semiconducting wafers, Polarization, Image processing, Process modeling, Scanners

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Proceedings Article | 15 March 2006 Paper

The improvement of DOF for sub-100nm process by focus scan

Jung-Chan Kim, Hyun-Jo Yang, Jin-Hyuck Jeon, Chan-Ha Park, James Moon, Dong-gyu Yim, Jin-Woong Kim, Shih-en Tseng, Kyu-Kab Rhe, Young-Hong Min, Alek Chen

Proceedings Volume 6154, 61541K (2006) https://doi.org/10.1117/12.656897

KEYWORDS: Semiconducting wafers, Electroluminescence, Fiber optic illuminators, Photomasks, Image processing, Overlay metrology, Resolution enhancement technologies, Optical proximity correction, Photoresist processing, Scanners

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